Struct stm32_metapac::rcc::regs::Cifr
#[repr(transparent)]pub struct Cifr(pub u32);
Expand description
Clock interrupt flag register.
Tuple Fields§
§0: u32
Implementations§
§impl Cifr
impl Cifr
pub const fn lsirdyf(&self) -> bool
pub const fn lsirdyf(&self) -> bool
LSI ready interrupt flag Set by hardware when the LSI clock becomes stable and LSIRDYDIE is set. Cleared by software setting the LSIRDYC bit.
pub fn set_lsirdyf(&mut self, val: bool)
pub fn set_lsirdyf(&mut self, val: bool)
LSI ready interrupt flag Set by hardware when the LSI clock becomes stable and LSIRDYDIE is set. Cleared by software setting the LSIRDYC bit.
pub const fn lserdyf(&self) -> bool
pub const fn lserdyf(&self) -> bool
LSE ready interrupt flag Set by hardware when the LSE clock becomes stable and LSERDYDIE is set. Cleared by software setting the LSERDYC bit.
pub fn set_lserdyf(&mut self, val: bool)
pub fn set_lserdyf(&mut self, val: bool)
LSE ready interrupt flag Set by hardware when the LSE clock becomes stable and LSERDYDIE is set. Cleared by software setting the LSERDYC bit.
pub const fn msirdyf(&self) -> bool
pub const fn msirdyf(&self) -> bool
MSI ready interrupt flag Set by hardware when the MSI clock becomes stable and MSIRDYDIE is set. Cleared by software setting the MSIRDYC bit.
pub fn set_msirdyf(&mut self, val: bool)
pub fn set_msirdyf(&mut self, val: bool)
MSI ready interrupt flag Set by hardware when the MSI clock becomes stable and MSIRDYDIE is set. Cleared by software setting the MSIRDYC bit.
pub const fn hsirdyf(&self) -> bool
pub const fn hsirdyf(&self) -> bool
HSI ready interrupt flag Set by hardware when the HSI clock becomes stable and HSIRDYIE is set in a response to setting the HSION (refer to Clock control register (RCC_CR)). When HSION is not set but the HSI oscillator is enabled by the peripheral through a clock request, this bit is not set and no interrupt is generated. Cleared by software setting the HSIRDYC bit.
pub fn set_hsirdyf(&mut self, val: bool)
pub fn set_hsirdyf(&mut self, val: bool)
HSI ready interrupt flag Set by hardware when the HSI clock becomes stable and HSIRDYIE is set in a response to setting the HSION (refer to Clock control register (RCC_CR)). When HSION is not set but the HSI oscillator is enabled by the peripheral through a clock request, this bit is not set and no interrupt is generated. Cleared by software setting the HSIRDYC bit.
pub const fn hserdyf(&self) -> bool
pub const fn hserdyf(&self) -> bool
HSE ready interrupt flag Set by hardware when the HSE clock becomes stable and HSERDYIE is set. Cleared by software setting the HSERDYC bit.
pub fn set_hserdyf(&mut self, val: bool)
pub fn set_hserdyf(&mut self, val: bool)
HSE ready interrupt flag Set by hardware when the HSE clock becomes stable and HSERDYIE is set. Cleared by software setting the HSERDYC bit.
pub const fn pllrdyf(&self) -> bool
pub const fn pllrdyf(&self) -> bool
PLL ready interrupt flag Set by hardware when the PLL locks and PLLRDYIE is set. Cleared by software setting the PLLRDYC bit.
pub fn set_pllrdyf(&mut self, val: bool)
pub fn set_pllrdyf(&mut self, val: bool)
PLL ready interrupt flag Set by hardware when the PLL locks and PLLRDYIE is set. Cleared by software setting the PLLRDYC bit.
pub const fn cssf(&self) -> bool
pub const fn cssf(&self) -> bool
HSE clock security system interrupt flag Set by hardware when a failure is detected in the HSE oscillator. Cleared by software setting the CSSC bit.
pub fn set_cssf(&mut self, val: bool)
pub fn set_cssf(&mut self, val: bool)
HSE clock security system interrupt flag Set by hardware when a failure is detected in the HSE oscillator. Cleared by software setting the CSSC bit.
pub const fn lsecssf(&self) -> bool
pub const fn lsecssf(&self) -> bool
LSE clock security system interrupt flag Set by hardware when a failure is detected in the LSE oscillator. Cleared by software by setting the LSECSSC bit.
pub fn set_lsecssf(&mut self, val: bool)
pub fn set_lsecssf(&mut self, val: bool)
LSE clock security system interrupt flag Set by hardware when a failure is detected in the LSE oscillator. Cleared by software by setting the LSECSSC bit.
pub const fn hsi48rdyf(&self) -> bool
pub const fn hsi48rdyf(&self) -> bool
HSI48 ready interrupt flag Set by hardware when the HSI48 clock becomes stable and HSI48RDYIE is set in a response to setting the HSI48ON (refer to RCC clock recovery RC register (RCC_CRRCR)). Cleared by software setting the HSI48RDYC bit.
pub fn set_hsi48rdyf(&mut self, val: bool)
pub fn set_hsi48rdyf(&mut self, val: bool)
HSI48 ready interrupt flag Set by hardware when the HSI48 clock becomes stable and HSI48RDYIE is set in a response to setting the HSI48ON (refer to RCC clock recovery RC register (RCC_CRRCR)). Cleared by software setting the HSI48RDYC bit.