Struct stm32_metapac::rcc::regs::Icscr
#[repr(transparent)]pub struct Icscr(pub u32);
Expand description
Internal clock sources calibration register.
Tuple Fields§
§0: u32
Implementations§
§impl Icscr
impl Icscr
pub const fn msical(&self) -> u8
pub const fn msical(&self) -> u8
MSI clock calibration These bits are initialized at startup with the factory-programmed MSI calibration trim value. When MSITRIM is written, MSICAL is updated with the sum of MSITRIM and the factory trim value.
pub fn set_msical(&mut self, val: u8)
pub fn set_msical(&mut self, val: u8)
MSI clock calibration These bits are initialized at startup with the factory-programmed MSI calibration trim value. When MSITRIM is written, MSICAL is updated with the sum of MSITRIM and the factory trim value.
pub const fn msitrim(&self) -> u8
pub const fn msitrim(&self) -> u8
MSI clock trimming These bits provide an additional user-programmable trimming value that is added to the MSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the MSI.
pub fn set_msitrim(&mut self, val: u8)
pub fn set_msitrim(&mut self, val: u8)
MSI clock trimming These bits provide an additional user-programmable trimming value that is added to the MSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the MSI.
pub const fn hsical(&self) -> u8
pub const fn hsical(&self) -> u8
HSI clock calibration These bits are initialized at startup with the factory-programmed HSI calibration trim value. When HSITRIM is written, HSICAL is updated with the sum of HSITRIM and the factory trim value.
pub fn set_hsical(&mut self, val: u8)
pub fn set_hsical(&mut self, val: u8)
HSI clock calibration These bits are initialized at startup with the factory-programmed HSI calibration trim value. When HSITRIM is written, HSICAL is updated with the sum of HSITRIM and the factory trim value.
pub const fn hsitrim(&self) -> u8
pub const fn hsitrim(&self) -> u8
HSI clock trimming These bits provide an additional user-programmable trimming value that is added to the HSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the HSI. The default value is 64 when added to the HSICAL value, trim the HSI to 161MHz 1 11%.
pub fn set_hsitrim(&mut self, val: u8)
pub fn set_hsitrim(&mut self, val: u8)
HSI clock trimming These bits provide an additional user-programmable trimming value that is added to the HSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the HSI. The default value is 64 when added to the HSICAL value, trim the HSI to 161MHz 1 11%.
Trait Implementations§
impl Copy for Icscr
impl Eq for Icscr
impl StructuralPartialEq for Icscr
Auto Trait Implementations§
impl Freeze for Icscr
impl RefUnwindSafe for Icscr
impl Send for Icscr
impl Sync for Icscr
impl Unpin for Icscr
impl UnwindSafe for Icscr
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)