Struct stm32_metapac::syscfg::regs::Cfgr2
#[repr(transparent)]pub struct Cfgr2(pub u32);
Expand description
SYSCFG configuration register 2
Tuple Fields§
§0: u32
Implementations§
§impl Cfgr2
impl Cfgr2
pub const fn ccl(&self) -> bool
pub const fn ccl(&self) -> bool
Cortex
pub fn set_ccl(&mut self, val: bool)
pub fn set_ccl(&mut self, val: bool)
Cortex
pub const fn spl(&self) -> bool
pub const fn spl(&self) -> bool
SRAM1 parity lock bit This bit is set by software and cleared by a system reset. It can be used to enable and lock the SRAM1 parity error signal connection to TIM1/15/16 Break input.
pub fn set_spl(&mut self, val: bool)
pub fn set_spl(&mut self, val: bool)
SRAM1 parity lock bit This bit is set by software and cleared by a system reset. It can be used to enable and lock the SRAM1 parity error signal connection to TIM1/15/16 Break input.
pub const fn pvdl(&self) -> bool
pub const fn pvdl(&self) -> bool
PVD lock enable bit This bit is set by software and cleared by a system reset. It can be used to enable and lock the PVD connection to TIM1/15/16 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR register.
pub fn set_pvdl(&mut self, val: bool)
pub fn set_pvdl(&mut self, val: bool)
PVD lock enable bit This bit is set by software and cleared by a system reset. It can be used to enable and lock the PVD connection to TIM1/15/16 Break input, as well as the PVDE and PLS[2:0] in the PWR_CR register.
pub const fn eccl(&self) -> bool
pub const fn eccl(&self) -> bool
ECC error lock bit This bit is set by software and cleared by a system reset. It can be used to enable and lock the flash ECC 2-bit error detection signal connection to TIM1/15/16 Break input.
pub fn set_eccl(&mut self, val: bool)
pub fn set_eccl(&mut self, val: bool)
ECC error lock bit This bit is set by software and cleared by a system reset. It can be used to enable and lock the flash ECC 2-bit error detection signal connection to TIM1/15/16 Break input.
pub const fn bkpl(&self) -> bool
pub const fn bkpl(&self) -> bool
Backup SRAM2 parity lock This bit is set by software and cleared by a system reset. It can be used to enable and lock the SRAM2 parity error signal connection to TIM1/15/16 Break input.
pub fn set_bkpl(&mut self, val: bool)
pub fn set_bkpl(&mut self, val: bool)
Backup SRAM2 parity lock This bit is set by software and cleared by a system reset. It can be used to enable and lock the SRAM2 parity error signal connection to TIM1/15/16 Break input.
pub const fn bkpf(&self) -> bool
pub const fn bkpf(&self) -> bool
Backup SRAM2 parity error flag This bit is set by hardware when an SRAM2 parity error is detected. It is cleared by software by writing 1.
pub fn set_bkpf(&mut self, val: bool)
pub fn set_bkpf(&mut self, val: bool)
Backup SRAM2 parity error flag This bit is set by hardware when an SRAM2 parity error is detected. It is cleared by software by writing 1.