Enum Msissel
#[repr(u8)]pub enum Msissel {
MSIRC0_96MHZ = 0,
MSIRC1_24MHZ = 1,
}Variants§
MSIRC0_96MHZ = 0
MSIRC0 (96 MHz) is selected as source to generate MSIS.
MSIRC1_24MHZ = 1
MSIRC1 (24 MHz) is selected as source to generate MSIS.
Implementations§
Trait Implementations§
§impl Ord for Msissel
impl Ord for Msissel
§impl PartialOrd for Msissel
impl PartialOrd for Msissel
impl Copy for Msissel
impl Eq for Msissel
impl StructuralPartialEq for Msissel
Auto Trait Implementations§
impl Freeze for Msissel
impl RefUnwindSafe for Msissel
impl Send for Msissel
impl Sync for Msissel
impl Unpin for Msissel
impl UnwindSafe for Msissel
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more