Struct stm32_metapac::rcc::regs::Ahb1smenr
#[repr(transparent)]pub struct Ahb1smenr(pub u32);Expand description
RCC AHB1 peripheral clocks enable in Sleep and Stop modes register
Tuple Fields§
§0: u32Implementations§
§impl Ahb1smenr
impl Ahb1smenr
pub const fn gpdma1smen(&self) -> bool
pub const fn gpdma1smen(&self) -> bool
GPDMA1 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.
pub fn set_gpdma1smen(&mut self, val: bool)
pub fn set_gpdma1smen(&mut self, val: bool)
GPDMA1 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.
pub const fn cordicsmen(&self) -> bool
pub const fn cordicsmen(&self) -> bool
CORDIC clocks enable during Sleep and Stop modes Set and cleared by software during Sleep mode.
pub fn set_cordicsmen(&mut self, val: bool)
pub fn set_cordicsmen(&mut self, val: bool)
CORDIC clocks enable during Sleep and Stop modes Set and cleared by software during Sleep mode.
pub const fn fmacsmen(&self) -> bool
pub const fn fmacsmen(&self) -> bool
FMAC clocks enable during Sleep and Stop modes. Set and cleared by software.
pub fn set_fmacsmen(&mut self, val: bool)
pub fn set_fmacsmen(&mut self, val: bool)
FMAC clocks enable during Sleep and Stop modes. Set and cleared by software.
pub const fn mdf1smen(&self) -> bool
pub const fn mdf1smen(&self) -> bool
MDF1 clocks enable during Sleep and Stop modes. Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.
pub fn set_mdf1smen(&mut self, val: bool)
pub fn set_mdf1smen(&mut self, val: bool)
MDF1 clocks enable during Sleep and Stop modes. Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.
pub const fn flashsmen(&self) -> bool
pub const fn flashsmen(&self) -> bool
FLASH clocks enable during Sleep and Stop modes Set and cleared by software.
pub fn set_flashsmen(&mut self, val: bool)
pub fn set_flashsmen(&mut self, val: bool)
FLASH clocks enable during Sleep and Stop modes Set and cleared by software.
pub const fn crcsmen(&self) -> bool
pub const fn crcsmen(&self) -> bool
CRC clocks enable during Sleep and Stop modes Set and cleared by software.
pub fn set_crcsmen(&mut self, val: bool)
pub fn set_crcsmen(&mut self, val: bool)
CRC clocks enable during Sleep and Stop modes Set and cleared by software.
pub const fn jpegsmen(&self) -> bool
pub const fn jpegsmen(&self) -> bool
JPEG clocks enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_jpegsmen(&mut self, val: bool)
pub fn set_jpegsmen(&mut self, val: bool)
JPEG clocks enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub const fn tscsmen(&self) -> bool
pub const fn tscsmen(&self) -> bool
TSC clocks enable during Sleep and Stop modes Set and cleared by software.
pub fn set_tscsmen(&mut self, val: bool)
pub fn set_tscsmen(&mut self, val: bool)
TSC clocks enable during Sleep and Stop modes Set and cleared by software.
pub const fn ramcfgsmen(&self) -> bool
pub const fn ramcfgsmen(&self) -> bool
RAMCFG clocks enable during Sleep and Stop modes Set and cleared by software.
pub fn set_ramcfgsmen(&mut self, val: bool)
pub fn set_ramcfgsmen(&mut self, val: bool)
RAMCFG clocks enable during Sleep and Stop modes Set and cleared by software.
pub const fn dma2dsmen(&self) -> bool
pub const fn dma2dsmen(&self) -> bool
DMA2D clocks enable during Sleep and Stop modes Set and cleared by software.
pub fn set_dma2dsmen(&mut self, val: bool)
pub fn set_dma2dsmen(&mut self, val: bool)
DMA2D clocks enable during Sleep and Stop modes Set and cleared by software.
pub const fn gfxmmusmen(&self) -> bool
pub const fn gfxmmusmen(&self) -> bool
GFXMMU clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_gfxmmusmen(&mut self, val: bool)
pub fn set_gfxmmusmen(&mut self, val: bool)
GFXMMU clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub const fn gpu2dsmen(&self) -> bool
pub const fn gpu2dsmen(&self) -> bool
GPU2D clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_gpu2dsmen(&mut self, val: bool)
pub fn set_gpu2dsmen(&mut self, val: bool)
GPU2D clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub const fn dcache2smen(&self) -> bool
pub const fn dcache2smen(&self) -> bool
DCACHE2 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_dcache2smen(&mut self, val: bool)
pub fn set_dcache2smen(&mut self, val: bool)
DCACHE2 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub const fn gtzc1smen(&self) -> bool
pub const fn gtzc1smen(&self) -> bool
GTZC1 clocks enable during Sleep and Stop modes Set and cleared by software.
pub fn set_gtzc1smen(&mut self, val: bool)
pub fn set_gtzc1smen(&mut self, val: bool)
GTZC1 clocks enable during Sleep and Stop modes Set and cleared by software.
pub const fn bkpsramsmen(&self) -> bool
pub const fn bkpsramsmen(&self) -> bool
BKPSRAM clocks enable during Sleep and Stop modes Set and cleared by software
pub fn set_bkpsramsmen(&mut self, val: bool)
pub fn set_bkpsramsmen(&mut self, val: bool)
BKPSRAM clocks enable during Sleep and Stop modes Set and cleared by software
pub const fn icachesmen(&self) -> bool
pub const fn icachesmen(&self) -> bool
ICACHE clocks enable during Sleep and Stop modes Set and cleared by software.
pub fn set_icachesmen(&mut self, val: bool)
pub fn set_icachesmen(&mut self, val: bool)
ICACHE clocks enable during Sleep and Stop modes Set and cleared by software.
pub const fn dcache1smen(&self) -> bool
pub const fn dcache1smen(&self) -> bool
DCACHE1 clocks enable during Sleep and Stop modes Set and cleared by software.
pub fn set_dcache1smen(&mut self, val: bool)
pub fn set_dcache1smen(&mut self, val: bool)
DCACHE1 clocks enable during Sleep and Stop modes Set and cleared by software.
pub const fn sram1smen(&self) -> bool
pub const fn sram1smen(&self) -> bool
SRAM1 clocks enable during Sleep and Stop modes Set and cleared by software.
pub fn set_sram1smen(&mut self, val: bool)
pub fn set_sram1smen(&mut self, val: bool)
SRAM1 clocks enable during Sleep and Stop modes Set and cleared by software.