Struct stm32_metapac::rcc::regs::Ahb2enr1
#[repr(transparent)]pub struct Ahb2enr1(pub u32);Expand description
RCC AHB2 peripheral clock enable register 1
Tuple Fields§
§0: u32Implementations§
§impl Ahb2enr1
impl Ahb2enr1
pub fn set_gpioaen(&mut self, val: bool)
pub fn set_gpioaen(&mut self, val: bool)
IO port A clock enable Set and cleared by software.
pub fn set_gpioben(&mut self, val: bool)
pub fn set_gpioben(&mut self, val: bool)
IO port B clock enable Set and cleared by software.
pub fn set_gpiocen(&mut self, val: bool)
pub fn set_gpiocen(&mut self, val: bool)
IO port C clock enable Set and cleared by software.
pub fn set_gpioden(&mut self, val: bool)
pub fn set_gpioden(&mut self, val: bool)
IO port D clock enable Set and cleared by software.
pub fn set_gpioeen(&mut self, val: bool)
pub fn set_gpioeen(&mut self, val: bool)
IO port E clock enable Set and cleared by software.
pub fn set_gpiofen(&mut self, val: bool)
pub fn set_gpiofen(&mut self, val: bool)
IO port F clock enable Set and cleared by software.
pub fn set_gpiogen(&mut self, val: bool)
pub fn set_gpiogen(&mut self, val: bool)
IO port G clock enable Set and cleared by software.
pub fn set_gpiohen(&mut self, val: bool)
pub fn set_gpiohen(&mut self, val: bool)
IO port H clock enable Set and cleared by software.
pub fn set_gpioien(&mut self, val: bool)
pub fn set_gpioien(&mut self, val: bool)
IO port I clock enable Set and cleared by software.
pub const fn gpiojen(&self) -> bool
pub const fn gpiojen(&self) -> bool
I/O port J clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_gpiojen(&mut self, val: bool)
pub fn set_gpiojen(&mut self, val: bool)
I/O port J clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub const fn adc12en(&self) -> bool
pub const fn adc12en(&self) -> bool
ADC1 and ADC2 clock enable This bit is set and cleared by software. Note: This bit impacts ADC1 in STM32U535/545/575/585, and ADC1/ADC2 in�STM32U59x/5Ax/5Fx/5Gx.
pub fn set_adc12en(&mut self, val: bool)
pub fn set_adc12en(&mut self, val: bool)
ADC1 and ADC2 clock enable This bit is set and cleared by software. Note: This bit impacts ADC1 in STM32U535/545/575/585, and ADC1/ADC2 in�STM32U59x/5Ax/5Fx/5Gx.
pub fn set_dcmien(&mut self, val: bool)
pub fn set_dcmien(&mut self, val: bool)
DCMI and PSSI clock enable Set and cleared by software.
pub const fn usb_otg_fsen(&self) -> bool
pub const fn usb_otg_fsen(&self) -> bool
OTG_FS clock enable Set and cleared by software.
pub fn set_usb_otg_fsen(&mut self, val: bool)
pub fn set_usb_otg_fsen(&mut self, val: bool)
OTG_FS clock enable Set and cleared by software.
pub const fn usb_otg_hsen(&self) -> bool
pub const fn usb_otg_hsen(&self) -> bool
OTG_HS clock enable Set and cleared by software.
pub fn set_usb_otg_hsen(&mut self, val: bool)
pub fn set_usb_otg_hsen(&mut self, val: bool)
OTG_HS clock enable Set and cleared by software.
pub const fn usb_otg_hs_phyen(&self) -> bool
pub const fn usb_otg_hs_phyen(&self) -> bool
OTG_HS PHY clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_usb_otg_hs_phyen(&mut self, val: bool)
pub fn set_usb_otg_hs_phyen(&mut self, val: bool)
OTG_HS PHY clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_hashen(&mut self, val: bool)
pub fn set_hashen(&mut self, val: bool)
HASH clock enable Set and cleared by software
pub fn set_saesen(&mut self, val: bool)
pub fn set_saesen(&mut self, val: bool)
SAES clock enable Set and cleared by software.
pub const fn octospimen(&self) -> bool
pub const fn octospimen(&self) -> bool
OCTOSPIM clock enable Set and cleared by software.
pub fn set_octospimen(&mut self, val: bool)
pub fn set_octospimen(&mut self, val: bool)
OCTOSPIM clock enable Set and cleared by software.
pub fn set_otfdec1en(&mut self, val: bool)
pub fn set_otfdec1en(&mut self, val: bool)
OTFDEC1 clock enable Set and cleared by software.
pub fn set_otfdec2en(&mut self, val: bool)
pub fn set_otfdec2en(&mut self, val: bool)
OTFDEC2 clock enable Set and cleared by software.
pub fn set_sdmmc1en(&mut self, val: bool)
pub fn set_sdmmc1en(&mut self, val: bool)
SDMMC1 clock enable Set and cleared by software.
pub fn set_sdmmc2en(&mut self, val: bool)
pub fn set_sdmmc2en(&mut self, val: bool)
SDMMC2 clock enable Set and cleared by software.
pub fn set_sram2en(&mut self, val: bool)
pub fn set_sram2en(&mut self, val: bool)
SRAM2 clock enable Set and reset by software.
pub fn set_sram3en(&mut self, val: bool)
pub fn set_sram3en(&mut self, val: bool)
SRAM3 clock enable Set and reset by software.