Struct stm32_metapac::rcc::regs::Ahb2enr2
#[repr(transparent)]pub struct Ahb2enr2(pub u32);
Expand description
RCC AHB2 peripheral clock enable register 2
Tuple Fields§
§0: u32
Implementations§
§impl Ahb2enr2
impl Ahb2enr2
pub fn set_fsmcen(&mut self, val: bool)
pub fn set_fsmcen(&mut self, val: bool)
FSMC clock enable Set and cleared by software.
pub const fn octospi1en(&self) -> bool
pub const fn octospi1en(&self) -> bool
OCTOSPI1 clock enable Set and cleared by software.
pub fn set_octospi1en(&mut self, val: bool)
pub fn set_octospi1en(&mut self, val: bool)
OCTOSPI1 clock enable Set and cleared by software.
pub const fn octospi2en(&self) -> bool
pub const fn octospi2en(&self) -> bool
OCTOSPI2 clock enable Set and cleared by software.
pub fn set_octospi2en(&mut self, val: bool)
pub fn set_octospi2en(&mut self, val: bool)
OCTOSPI2 clock enable Set and cleared by software.
pub const fn hspi1en(&self) -> bool
pub const fn hspi1en(&self) -> bool
HSPI1 clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_hspi1en(&mut self, val: bool)
pub fn set_hspi1en(&mut self, val: bool)
HSPI1 clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub const fn sram6en(&self) -> bool
pub const fn sram6en(&self) -> bool
SRAM6 clock enable This bit is set and reset by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_sram6en(&mut self, val: bool)
pub fn set_sram6en(&mut self, val: bool)
SRAM6 clock enable This bit is set and reset by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub const fn sram5en(&self) -> bool
pub const fn sram5en(&self) -> bool
SRAM5 clock enable This bit is set and reset by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
pub fn set_sram5en(&mut self, val: bool)
pub fn set_sram5en(&mut self, val: bool)
SRAM5 clock enable This bit is set and reset by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.
Trait Implementations§
impl Copy for Ahb2enr2
impl Eq for Ahb2enr2
impl StructuralPartialEq for Ahb2enr2
Auto Trait Implementations§
impl Freeze for Ahb2enr2
impl RefUnwindSafe for Ahb2enr2
impl Send for Ahb2enr2
impl Sync for Ahb2enr2
impl Unpin for Ahb2enr2
impl UnwindSafe for Ahb2enr2
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)