Enum stm32_metapac::timer::vals::Sms
#[repr(u8)]pub enum Sms {
Show 16 variants
DISABLED = 0,
ENCODER_MODE_1 = 1,
ENCODER_MODE_2 = 2,
ENCODER_MODE_3 = 3,
RESET_MODE = 4,
GATED_MODE = 5,
TRIGGER_MODE = 6,
EXT_CLOCK_MODE = 7,
COMBINED_RESET_TRIGGER = 8,
COMBINED_GATED_TRIGGER = 9,
ENCODER_UP_X2 = 10,
ENCODER_UP_X1 = 11,
ENCODER_DIR_X2 = 12,
ENCODER_DIR_X1 = 13,
QUADRATURE_ENCODER_MODE_X1_TI1PF1 = 14,
QUADRATURE_ENCODER_MODE_X1_TI2PF2 = 15,
}
Variants§
DISABLED = 0
Slave mode disabled - if CEN = ‘1’ then the prescaler is clocked directly by the internal clock.
ENCODER_MODE_1 = 1
Encoder mode 1 - Counter counts up/down on TI2FP1 edge depending on TI1FP2 level.
ENCODER_MODE_2 = 2
Encoder mode 2 - Counter counts up/down on TI1FP2 edge depending on TI2FP1 level.
ENCODER_MODE_3 = 3
Encoder mode 3 - Counter counts up/down on both TI1FP1 and TI2FP2 edges depending on the level of the other input.
RESET_MODE = 4
Reset Mode - Rising edge of the selected trigger input (TRGI) reinitializes the counter and generates an update of the registers.
GATED_MODE = 5
Gated Mode - The counter clock is enabled when the trigger input (TRGI) is high. The counter stops (but is not reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled.
TRIGGER_MODE = 6
Trigger Mode - The counter starts at a rising edge of the trigger TRGI (but it is not reset). Only the start of the counter is controlled.
EXT_CLOCK_MODE = 7
External Clock Mode 1 - Rising edges of the selected trigger (TRGI) clock the counter.
COMBINED_RESET_TRIGGER = 8
Rising edge of the selected trigger input (tim_trgi) reinitializes the counter, generates an update of the registers and starts the counter.
COMBINED_GATED_TRIGGER = 9
The counter clock is enabled when the trigger input (tim_trgi) is high. The counter stops and is reset) as soon as the trigger becomes low. Both start and stop of the counter are controlled.
ENCODER_UP_X2 = 10
Encoder mode, Clock plus direction, x2 mode.
ENCODER_UP_X1 = 11
Encoder mode, Clock plus direction, x1 mode, tim_ti2fp2 edge sensitivity is set by CC2P
ENCODER_DIR_X2 = 12
Encoder mode, Directional Clock, x2 mode.
ENCODER_DIR_X1 = 13
Encoder mode, Directional Clock, x1 mode, tim_ti1fp1 and tim_ti2fp2 edge sensitivity is set by CC1P and CC2P.
QUADRATURE_ENCODER_MODE_X1_TI1PF1 = 14
Quadrature encoder mode, x1 mode, counting on tim_ti1fp1 edges only, edge sensitivity is set by CC1P.
QUADRATURE_ENCODER_MODE_X1_TI2PF2 = 15
Quadrature encoder mode, x1 mode, counting on tim_ti2fp2 edges only, edge sensitivity is set by CC2P.
Implementations§
Trait Implementations§
§impl Ord for Sms
impl Ord for Sms
§impl PartialOrd for Sms
impl PartialOrd for Sms
impl Copy for Sms
impl Eq for Sms
impl StructuralPartialEq for Sms
Auto Trait Implementations§
impl Freeze for Sms
impl RefUnwindSafe for Sms
impl Send for Sms
impl Sync for Sms
impl Unpin for Sms
impl UnwindSafe for Sms
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)