Skip to main contentModule regs
- Adc4Awd2cr
- Analog watchdog 2 configuration register
- Adc4Awd3cr
- Analog watchdog 3 configuration register
- Adc4Calfact
- Calibration factor register
- Adc4Ccr
- Common configuration register
- Adc4Cfgr1
- Configuration register 1
- Adc4Cfgr2
- Configuration register 2
- Adc4Chselr
- Channel selection register (CHSELRMOD = 0)
- Adc4ChselrSq
- Channel selection register (CHSELRMOD = 1)
- Adc4Cr
- Control register
- Adc4Dr
- Data register
- Adc4Ier
- Interrupt enable register
- Adc4Isr
- Interrupt and status register
- Adc4Or
- Option register
- Adc4Pwrr
- Power register
- Adc4Smpr
- Sampling time register
- Adc4Tr
- Analog watchdog threshold register
- Awd2cr
- Analog watchdog 2 configuration register
- Awd3cr
- Analog watchdog 3 configuration register
- Calfact
- Calibration factors register
- Calfact2
- Linearity calibration factors register
- Cfgr
- Configuration register
- Cfgr2
- Configuration register 2
- Cr
- Control register
- Difsel
- Differential mode selection register
- Dr
- Regular data register
- Gcomp
- Gain compensation register
- Htr
- Analog watchdog higher threshold register
- Ier
- Interrupt enable register
- Isr
- Interrupt and status register
- Jdr
- Injected data register
- Jsqr
- Injected sequence register
- Ltr
- Analog watchdog lower threshold register
- Ofr
- Offset register
- Pcsel
- Channel preselection register
- Smpr
- Sample time register
- Sqr1
- Regular sequence register 1
- Sqr2
- Regular sequence register 2
- Sqr3
- Regular sequence register 3
- Sqr4
- Regular sequence register 4