Struct stm32_metapac::dsihost::regs::Wpcr0

#[repr(transparent)]
pub struct Wpcr0(pub u32);

DSI Wrapper PHY configuration register 0.

Tuple Fields

0: u32

Implementations

impl Wpcr0

pub const fn swcl(&self) -> bool

Swap clock lane pins This bit swaps the pins on clock lane.

pub fn set_swcl(&mut self, val: bool)

Swap clock lane pins This bit swaps the pins on clock lane.

pub const fn swdl0(&self) -> bool

Swap data lane 0 pins This bit swaps the pins on data lane 0.

pub fn set_swdl0(&mut self, val: bool)

Swap data lane 0 pins This bit swaps the pins on data lane 0.

pub const fn swdl1(&self) -> bool

Swap data lane 1 pins This bit swaps the pins on clock lane.

pub fn set_swdl1(&mut self, val: bool)

Swap data lane 1 pins This bit swaps the pins on clock lane.

pub const fn ftxsmcl(&self) -> bool

Force in TX Stop mode the clock lane This bit forces the clock lane in TX stop mode. It is used to initialize a lane module in transmit mode. It causes the lane module to immediately jump to transmit control mode and to begin transmitting a stop state (LP-11). It can be used to go back in TX mode after a wrong BTA sequence.

pub fn set_ftxsmcl(&mut self, val: bool)

Force in TX Stop mode the clock lane This bit forces the clock lane in TX stop mode. It is used to initialize a lane module in transmit mode. It causes the lane module to immediately jump to transmit control mode and to begin transmitting a stop state (LP-11). It can be used to go back in TX mode after a wrong BTA sequence.

pub const fn ftxsmdl(&self) -> bool

Force in TX Stop mode the data lanes This bit forces the data lanes in TX stop mode. It is used to initialize a lane module in transmit mode. It causes the lane module to immediately jump to transmit control mode and to begin transmitting a stop state (LP-11). It can be used to go back in TX mode after a wrong BTA sequence.

pub fn set_ftxsmdl(&mut self, val: bool)

Force in TX Stop mode the data lanes This bit forces the data lanes in TX stop mode. It is used to initialize a lane module in transmit mode. It causes the lane module to immediately jump to transmit control mode and to begin transmitting a stop state (LP-11). It can be used to go back in TX mode after a wrong BTA sequence.

Trait Implementations

impl Clone for Wpcr0

fn clone(&self) -> Wpcr0

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Wpcr0

fn default() -> Wpcr0

Returns the “default value” for a type.

impl PartialEq for Wpcr0

fn eq(&self, other: &Wpcr0) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Wpcr0

impl Eq for Wpcr0

impl StructuralPartialEq for Wpcr0