Struct stm32_metapac::hspi::regs::Tcr

#[repr(transparent)]
pub struct Tcr(pub u32);

HSPI timing configuration register.

Tuple Fields

0: u32

Implementations

impl Tcr

pub const fn dcyc(&self) -> u8

Number of dummy cycles This field defines the duration of the dummy phase. In both SDR and DTR modes, it specifies a number of CLK cycles (0-31).

pub fn set_dcyc(&mut self, val: u8)

Number of dummy cycles This field defines the duration of the dummy phase. In both SDR and DTR modes, it specifies a number of CLK cycles (0-31).

pub const fn dhqc(&self) -> bool

Delay hold quarter cycle.

pub fn set_dhqc(&mut self, val: bool)

Delay hold quarter cycle.

pub const fn sshift(&self) -> bool

Sample shift By default, the HSPI samples data 1/2 of a CLK cycle after the data is driven by the external device. This bit allows the data to be sampled later in order to consider the external signal delays. The software must ensure that SSHIFT = 0 when the data phase is configured in DTR mode (when DDTR = 1.).

pub fn set_sshift(&mut self, val: bool)

Sample shift By default, the HSPI samples data 1/2 of a CLK cycle after the data is driven by the external device. This bit allows the data to be sampled later in order to consider the external signal delays. The software must ensure that SSHIFT = 0 when the data phase is configured in DTR mode (when DDTR = 1.).

Trait Implementations

impl Clone for Tcr

fn clone(&self) -> Tcr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Tcr

fn default() -> Tcr

Returns the “default value” for a type.

impl PartialEq for Tcr

fn eq(&self, other: &Tcr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Tcr

impl Eq for Tcr

impl StructuralPartialEq for Tcr