Struct stm32_metapac::can::regs::Tscc
#[repr(transparent)]pub struct Tscc(pub u32);
Expand description
FDCAN timestamp counter configuration register
Tuple Fields§
§0: u32
Implementations§
§impl Tscc
impl Tscc
pub const fn tss(&self) -> Tss
pub const fn tss(&self) -> Tss
Timestamp select. These are protected write (P) bits, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1
pub fn set_tss(&mut self, val: Tss)
pub fn set_tss(&mut self, val: Tss)
Timestamp select. These are protected write (P) bits, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1
pub const fn tcp(&self) -> u8
pub const fn tcp(&self) -> u8
Timestamp counter prescaler. Configures the timestamp and timeout counters time unit in multiples of CAN bit times [1 … 16]. The actual interpretation by the hardware of this value is such that one more than the value programmed here is used. In CAN FD mode the internal timestamp counter TCP does not provide a constant time base due to the different CAN bit times between arbitration phase and data phase. Thus CAN FD requires an external counter for timestamp generation (TSS = 10). These are protected write (P) bits, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1
pub fn set_tcp(&mut self, val: u8)
pub fn set_tcp(&mut self, val: u8)
Timestamp counter prescaler. Configures the timestamp and timeout counters time unit in multiples of CAN bit times [1 … 16]. The actual interpretation by the hardware of this value is such that one more than the value programmed here is used. In CAN FD mode the internal timestamp counter TCP does not provide a constant time base due to the different CAN bit times between arbitration phase and data phase. Thus CAN FD requires an external counter for timestamp generation (TSS = 10). These are protected write (P) bits, write access is possible only when the bit 1 [CCE] and bit 0 [INIT] of CCCR register are set to 1