Struct stm32_metapac::dsihost::regs::Tccr3
#[repr(transparent)]pub struct Tccr3(pub u32);
Expand description
DSI Host timeout counter configuration register 3.
Tuple Fields§
§0: u32
Implementations§
§impl Tccr3
impl Tccr3
pub const fn hswr_tocnt(&self) -> u16
pub const fn hswr_tocnt(&self) -> u16
High-speed write timeout counter This field sets a period for which the DSI Host keeps the link inactive after sending a high-speed write operation. This period is measured in cycles of lanebyteclk. The counting starts when the D-PHY enters the Stop state and causes no interrupts.
pub fn set_hswr_tocnt(&mut self, val: u16)
pub fn set_hswr_tocnt(&mut self, val: u16)
High-speed write timeout counter This field sets a period for which the DSI Host keeps the link inactive after sending a high-speed write operation. This period is measured in cycles of lanebyteclk. The counting starts when the D-PHY enters the Stop state and causes no interrupts.
pub const fn pm(&self) -> bool
pub const fn pm(&self) -> bool
Presp mode When set to 1, this bit ensures that the peripheral response timeout caused by HSWR_TOCNT is used only once per LTDC frame in command mode, when both the following conditions are met: dpivsync_edpiwms has risen and fallen. Packets originated from LTDC in command mode have been transmitted and its FIFO is empty again. In this scenario no non-LTDC command requests are sent to the D-PHY, even if there is traffic from generic interface ready to be sent, making it return to stop state. When it does so, PRESP_TO counter is activated and only when it finishes does the controller send any other traffic that is ready.
pub fn set_pm(&mut self, val: bool)
pub fn set_pm(&mut self, val: bool)
Presp mode When set to 1, this bit ensures that the peripheral response timeout caused by HSWR_TOCNT is used only once per LTDC frame in command mode, when both the following conditions are met: dpivsync_edpiwms has risen and fallen. Packets originated from LTDC in command mode have been transmitted and its FIFO is empty again. In this scenario no non-LTDC command requests are sent to the D-PHY, even if there is traffic from generic interface ready to be sent, making it return to stop state. When it does so, PRESP_TO counter is activated and only when it finishes does the controller send any other traffic that is ready.
Trait Implementations§
impl Copy for Tccr3
impl Eq for Tccr3
impl StructuralPartialEq for Tccr3
Auto Trait Implementations§
impl Freeze for Tccr3
impl RefUnwindSafe for Tccr3
impl Send for Tccr3
impl Sync for Tccr3
impl Unpin for Tccr3
impl UnwindSafe for Tccr3
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)