Struct stm32_metapac::pwr::regs::Cr2

#[repr(transparent)]
pub struct Cr2(pub u32);

Expand description

control register 2

Tuple Fields§

§0: u32

Implementations§

§

impl Cr2

pub const fn sram1pds1(&self) -> Pds

SRAM1 page 1 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)

pub fn set_sram1pds1(&mut self, val: Pds)

SRAM1 page 1 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)

pub const fn sram1pds2(&self) -> Pds

SRAM1 page 2 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)

pub fn set_sram1pds2(&mut self, val: Pds)

SRAM1 page 2 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)

pub const fn sram1pds3(&self) -> Pds

SRAM1 page 3 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)

pub fn set_sram1pds3(&mut self, val: Pds)

SRAM1 page 3 (64 Kbytes) power-down in Stop modes (Stop 0, 1, 2, 3)

pub const fn sram2pds1(&self) -> Pds

SRAM2 page 1 (8 Kbytes) power-down in Stop modes (Stop 0, 1, 2) Note: The SRAM2 page 1 retention in Stop 3 is controlled by RRSB1 bit in CR1.

pub fn set_sram2pds1(&mut self, val: Pds)

SRAM2 page 1 (8 Kbytes) power-down in Stop modes (Stop 0, 1, 2) Note: The SRAM2 page 1 retention in Stop 3 is controlled by RRSB1 bit in CR1.

pub const fn sram2pds2(&self) -> Pds

SRAM2 page 2 (56 Kbytes) power-down in Stop modes (Stop 0, 1, 2) Note: The SRAM2 page 2 retention in Stop 3 is controlled by RRSB2 bit in CR1.

pub fn set_sram2pds2(&mut self, val: Pds)

SRAM2 page 2 (56 Kbytes) power-down in Stop modes (Stop 0, 1, 2) Note: The SRAM2 page 2 retention in Stop 3 is controlled by RRSB2 bit in CR1.

pub const fn sram4pds(&self) -> Pds

SRAM4 power-down in Stop modes (Stop 0, 1, 2, 3)

pub fn set_sram4pds(&mut self, val: Pds)

SRAM4 power-down in Stop modes (Stop 0, 1, 2, 3)

pub const fn icrampds(&self) -> Pds

ICACHE SRAM power-down in Stop modes (Stop 0, 1, 2, 3)

pub fn set_icrampds(&mut self, val: Pds)

ICACHE SRAM power-down in Stop modes (Stop 0, 1, 2, 3)

pub const fn dc1rampds(&self) -> Pds

DCACHE1 SRAM power-down in Stop modes (Stop 0, 1, 2, 3)

pub fn set_dc1rampds(&mut self, val: Pds)

DCACHE1 SRAM power-down in Stop modes (Stop 0, 1, 2, 3)

pub const fn dma2drampds(&self) -> Pds

DMA2D SRAM power-down in Stop modes (Stop 0, 1, 2, 3)

pub fn set_dma2drampds(&mut self, val: Pds)

DMA2D SRAM power-down in Stop modes (Stop 0, 1, 2, 3)

pub const fn prampds(&self) -> Pds

FMAC, FDCAN and USB peripherals SRAM power-down in Stop modes (Stop0,1,2,3)

pub fn set_prampds(&mut self, val: Pds)

FMAC, FDCAN and USB peripherals SRAM power-down in Stop modes (Stop0,1,2,3)

pub const fn pkarampds(&self) -> Pds

PKA SRAM power-down

pub fn set_pkarampds(&mut self, val: Pds)

PKA SRAM power-down

pub const fn sram4fwu(&self) -> Sramfwu

SRAM4 fast wakeup from Stop 0, Stop 1 and Stop 2 modes This bit is used to obtain the best trade-off between low-power consumption and wakeup time. SRAM4 wakeup time increases the wakeup time when exiting Stop 0, 1 and 2 modes, and also increases the LPDMA access time to SRAM4 during Stop modes.

pub fn set_sram4fwu(&mut self, val: Sramfwu)

SRAM4 fast wakeup from Stop 0, Stop 1 and Stop 2 modes This bit is used to obtain the best trade-off between low-power consumption and wakeup time. SRAM4 wakeup time increases the wakeup time when exiting Stop 0, 1 and 2 modes, and also increases the LPDMA access time to SRAM4 during Stop modes.

pub const fn flashfwu(&self) -> Flashfwu

Flash memory fast wakeup from Stop 0 and Stop 1 modes This bit is used to obtain the best trade-off between low-power consumption and wakeup time when exiting the Stop 0 or Stop 1 modes. When this bit is set, the Flash memory remains in normal mode in Stop 0 and Stop 1 modes, which offers a faster startup time with higher consumption.

pub fn set_flashfwu(&mut self, val: Flashfwu)

Flash memory fast wakeup from Stop 0 and Stop 1 modes This bit is used to obtain the best trade-off between low-power consumption and wakeup time when exiting the Stop 0 or Stop 1 modes. When this bit is set, the Flash memory remains in normal mode in Stop 0 and Stop 1 modes, which offers a faster startup time with higher consumption.