Struct stm32_metapac::rcc::regs::Apb1smenr2

#[repr(transparent)]
pub struct Apb1smenr2(pub u32);

RCC APB1 peripheral clocks enable in Sleep and Stop modes register 2

Tuple Fields

0: u32

Implementations

impl Apb1smenr2

pub const fn i2c4smen(&self) -> bool

I2C4 clocks enable during Sleep and Stop modes Set and cleared by software Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_i2c4smen(&mut self, val: bool)

I2C4 clocks enable during Sleep and Stop modes Set and cleared by software Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn lptim2smen(&self) -> bool

LPTIM2 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_lptim2smen(&mut self, val: bool)

LPTIM2 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn i2c5smen(&self) -> bool

I2C5 clock enable during Sleep and Stop modes This bit is set and cleared by software Note: This bit must be set to allow the peripheral to wake up from Stop modes. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_i2c5smen(&mut self, val: bool)

I2C5 clock enable during Sleep and Stop modes This bit is set and cleared by software Note: This bit must be set to allow the peripheral to wake up from Stop modes. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn i2c6smen(&self) -> bool

I2C6 clock enable during Sleep and Stop modes This bit is set and cleared by software Note: This bit must be set to allow the peripheral to wake up from Stop modes. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_i2c6smen(&mut self, val: bool)

I2C6 clock enable during Sleep and Stop modes This bit is set and cleared by software Note: This bit must be set to allow the peripheral to wake up from Stop modes. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn fdcan1smen(&self) -> bool

FDCAN1 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_fdcan1smen(&mut self, val: bool)

FDCAN1 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn ucpd1smen(&self) -> bool

UCPD1 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_ucpd1smen(&mut self, val: bool)

UCPD1 clocks enable during Sleep and Stop modes Set and cleared by software.

Trait Implementations

impl Clone for Apb1smenr2

fn clone(&self) -> Apb1smenr2

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Apb1smenr2

fn default() -> Apb1smenr2

Returns the “default value” for a type.

impl PartialEq for Apb1smenr2

fn eq(&self, other: &Apb1smenr2) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Apb1smenr2

impl Eq for Apb1smenr2

impl StructuralPartialEq for Apb1smenr2