Struct Cr5 

#[repr(transparent)]
pub struct Cr5(pub u32);

CR5 register.

Tuple Fields

0: u32

Implementations

impl Cr5

pub const fn smpslvl(&self) -> u8

SMPSLVL[3:0] SMPS Output Level Voltage Selection Select the SMPS output voltage with a granularity of 50mV. Default = ‘0100’ (1.4V) Vout = 1.2 + 0.05*SMPSOUT (V).

pub fn set_smpslvl(&mut self, val: u8)

SMPSLVL[3:0] SMPS Output Level Voltage Selection Select the SMPS output voltage with a granularity of 50mV. Default = ‘0100’ (1.4V) Vout = 1.2 + 0.05*SMPSOUT (V).

pub const fn smpsbomsel(&self) -> Smpsbomsel

SMPSBOMSEL: SMPS BOM Selection:.

pub fn set_smpsbomsel(&mut self, val: Smpsbomsel)

SMPSBOMSEL: SMPS BOM Selection:.

pub const fn smpsfrdy(&self) -> Smpsfrdy

SMPSFB Force ready check When this bit is set, the SMPS FSM will consider the SMPS ready.

pub fn set_smpsfrdy(&mut self, val: Smpsfrdy)

SMPSFB Force ready check When this bit is set, the SMPS FSM will consider the SMPS ready.

pub const fn smpslpopen(&self) -> Smpslpopen

SMPSLPOPEN: In Low Power mode SMPS is in OPEN mode (instead of PRECHARGE mode). When this bit is set, when the chip is in Low power mode the SMPS regulator will be disabled (HZ) Documentation needed.

pub fn set_smpslpopen(&mut self, val: Smpslpopen)

SMPSLPOPEN: In Low Power mode SMPS is in OPEN mode (instead of PRECHARGE mode). When this bit is set, when the chip is in Low power mode the SMPS regulator will be disabled (HZ) Documentation needed.

pub const fn smpsfbyp(&self) -> Smpsfbyp

SMPSFB Force SMPS Regulator in bypass mode When this bit is set, the SMPS regulator will be forced to operate in precharge mode. the actual state of SMPS can be observed thanks to the replica SR2.SMPSBYPR.

pub fn set_smpsfbyp(&mut self, val: Smpsfbyp)

SMPSFB Force SMPS Regulator in bypass mode When this bit is set, the SMPS regulator will be forced to operate in precharge mode. the actual state of SMPS can be observed thanks to the replica SR2.SMPSBYPR.

pub const fn nosmps(&self) -> bool

NOSMPS: No SMPS Mode When this bit is set, the SMPS regulator will be disabled. Note that this configuration should be used only when SMPS_FB pad is directly connected to VBATT or Vext, without L/C BOM.

pub fn set_nosmps(&mut self, val: bool)

NOSMPS: No SMPS Mode When this bit is set, the SMPS regulator will be disabled. Note that this configuration should be used only when SMPS_FB pad is directly connected to VBATT or Vext, without L/C BOM.

pub const fn smps_ena_dcm(&self) -> bool

SMPS_ENA_DCM: enable discontinuous conduction mode.

pub fn set_smps_ena_dcm(&mut self, val: bool)

SMPS_ENA_DCM: enable discontinuous conduction mode.

pub const fn clkdetr_disable(&self) -> bool

CLKDETR_DISABLE: disable SMPS clock detection The SMPS clock detection enables an automatic SMPS bypass switching in case of unwanted loss of SMPS clock.

pub fn set_clkdetr_disable(&mut self, val: bool)

CLKDETR_DISABLE: disable SMPS clock detection The SMPS clock detection enables an automatic SMPS bypass switching in case of unwanted loss of SMPS clock.

pub const fn smps_prech_cur_sel(&self) -> SmpsPrechCurSel

SMPS_PRECH_CUR_SEL[1:0] Selection for SMPS PRECHARGE limit current.

pub fn set_smps_prech_cur_sel(&mut self, val: SmpsPrechCurSel)

SMPS_PRECH_CUR_SEL[1:0] Selection for SMPS PRECHARGE limit current.

Trait Implementations

impl Clone for Cr5

fn clone(&self) -> Cr5

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Cr5

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Cr5

fn default() -> Cr5

Returns the “default value” for a type.

impl PartialEq for Cr5

fn eq(&self, other: &Cr5) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Cr5

impl Eq for Cr5

impl StructuralPartialEq for Cr5