Struct Cier
#[repr(transparent)]pub struct Cier(pub u32);Expand description
CIER register.
Tuple Fields§
§0: u32Implementations§
§impl Cier
impl Cier
pub const fn lsirdyie(&self) -> Lsirdyie
pub const fn lsirdyie(&self) -> Lsirdyie
LSI Ready Interrupt Enable. Set and reset by software to enable/disable interrupt caused by internal RC 32 kHz oscillator stabilization.
pub fn set_lsirdyie(&mut self, val: Lsirdyie)
pub fn set_lsirdyie(&mut self, val: Lsirdyie)
LSI Ready Interrupt Enable. Set and reset by software to enable/disable interrupt caused by internal RC 32 kHz oscillator stabilization.
pub const fn lserdyie(&self) -> Lserdyie
pub const fn lserdyie(&self) -> Lserdyie
LSE Ready Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the external 32 kHz oscillator stabilization.
pub fn set_lserdyie(&mut self, val: Lserdyie)
pub fn set_lserdyie(&mut self, val: Lserdyie)
LSE Ready Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the external 32 kHz oscillator stabilization.
pub const fn hsirdyie(&self) -> Hsirdyie
pub const fn hsirdyie(&self) -> Hsirdyie
HSI Ready Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the internal RC 64MHz oscillator stabilization.
pub fn set_hsirdyie(&mut self, val: Hsirdyie)
pub fn set_hsirdyie(&mut self, val: Hsirdyie)
HSI Ready Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the internal RC 64MHz oscillator stabilization.
pub const fn hserdyie(&self) -> Hserdyie
pub const fn hserdyie(&self) -> Hserdyie
HSE Ready Interrupt Enable Set and reset by software to enable/disable interrupt caused by the external HSE oscillator stabilization.
pub fn set_hserdyie(&mut self, val: Hserdyie)
pub fn set_hserdyie(&mut self, val: Hserdyie)
HSE Ready Interrupt Enable Set and reset by software to enable/disable interrupt caused by the external HSE oscillator stabilization.
pub const fn hsipllrdyie(&self) -> Hsipllrdyie
pub const fn hsipllrdyie(&self) -> Hsipllrdyie
HSI PLL Ready Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the HSI 64MHz PLL locked on HSE.
pub fn set_hsipllrdyie(&mut self, val: Hsipllrdyie)
pub fn set_hsipllrdyie(&mut self, val: Hsipllrdyie)
HSI PLL Ready Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the HSI 64MHz PLL locked on HSE.
pub const fn hsipllunlockdetie(&self) -> Hsipllunlockdetie
pub const fn hsipllunlockdetie(&self) -> Hsipllunlockdetie
HSIPLLUNLOCKDETIE: HSI PLL unlock detection Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the HSI 64MHz PLL unlock.
pub fn set_hsipllunlockdetie(&mut self, val: Hsipllunlockdetie)
pub fn set_hsipllunlockdetie(&mut self, val: Hsipllunlockdetie)
HSIPLLUNLOCKDETIE: HSI PLL unlock detection Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the HSI 64MHz PLL unlock.
pub const fn rtcrstie(&self) -> Rtcrstie
pub const fn rtcrstie(&self) -> Rtcrstie
RTCRSTIE: RTC reset end Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the RTC reset end.
pub fn set_rtcrstie(&mut self, val: Rtcrstie)
pub fn set_rtcrstie(&mut self, val: Rtcrstie)
RTCRSTIE: RTC reset end Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the RTC reset end.
pub const fn wdgrstie(&self) -> Wdgrstie
pub const fn wdgrstie(&self) -> Wdgrstie
WDGRSTIE: Watchdog reset end Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the watchdog reset end.
pub fn set_wdgrstie(&mut self, val: Wdgrstie)
pub fn set_wdgrstie(&mut self, val: Wdgrstie)
WDGRSTIE: Watchdog reset end Interrupt Enable. Set and reset by software to enable/disable interrupt caused by the watchdog reset end.
pub fn set_lpurstie(&mut self, val: Lpurstie)
pub fn set_lpurstie(&mut self, val: Lpurstie)
LPURSTIE: LPUART reset release interrupt enable.