Struct Sr2 

#[repr(transparent)]
pub struct Sr2(pub u32);

SR2 register.

Tuple Fields

0: u32

Implementations

impl Sr2

pub const fn smpsbypr(&self) -> bool

SMPSBYPR: SMPS Force Bypass Control Replica This bit mirrors the actual BYPASS_3V3 control signal driven to the SMPS regulator, dependant on the real working state.

pub fn set_smpsbypr(&mut self, val: bool)

SMPSBYPR: SMPS Force Bypass Control Replica This bit mirrors the actual BYPASS_3V3 control signal driven to the SMPS regulator, dependant on the real working state.

pub const fn smpsenr(&self) -> bool

SMPSENR: SMPS Enable Control Replica This bit mirrors the actual ENABLE_3V3 control signal driven to the SMPS regulator, dependant on the real working state.

pub fn set_smpsenr(&mut self, val: bool)

SMPSENR: SMPS Enable Control Replica This bit mirrors the actual ENABLE_3V3 control signal driven to the SMPS regulator, dependant on the real working state.

pub const fn smpsrdy(&self) -> Smpsrdy

SMPSRDY: SMPS Ready Status This bit provides the information whether SMPS is ready.

pub fn set_smpsrdy(&mut self, val: Smpsrdy)

SMPSRDY: SMPS Ready Status This bit provides the information whether SMPS is ready.

pub const fn iobootval2(&self) -> u8

Bit3: PB15 input value on VDD33 latched at POR Bit2: PB14 input value on VDD33 latched at POR Bit1: PB13 input value on VDD33 latched at POR Bit0: PB12 input value on VDD33 latched at POR.

pub fn set_iobootval2(&mut self, val: u8)

Bit3: PB15 input value on VDD33 latched at POR Bit2: PB14 input value on VDD33 latched at POR Bit1: PB13 input value on VDD33 latched at POR Bit0: PB12 input value on VDD33 latched at POR.

pub const fn reglps(&self) -> Reglps

REGLPS: Regulator Low Power Started This bit provides the information whether low power regulator is ready.

pub fn set_reglps(&mut self, val: Reglps)

REGLPS: Regulator Low Power Started This bit provides the information whether low power regulator is ready.

pub const fn regms(&self) -> Regms

REGMS: Regulator Main LDO Started This bit provides the information whether main regulator is ready.

pub fn set_regms(&mut self, val: Regms)

REGMS: Regulator Main LDO Started This bit provides the information whether main regulator is ready.

pub const fn pvdo(&self) -> bool

PVDO: Power Voltage Detector Output When the Power Voltage Detector is enabled (CR2.PVDE) this bit is set when the system supply (VDDIO) is lower than the selected PVD threshold (CR2.PVDLS).

pub fn set_pvdo(&mut self, val: bool)

PVDO: Power Voltage Detector Output When the Power Voltage Detector is enabled (CR2.PVDE) this bit is set when the system supply (VDDIO) is lower than the selected PVD threshold (CR2.PVDLS).

pub const fn iobootval(&self) -> u8

Bit3: PA11 input value on VDD33 latched at POR Bit2: PA10 input value on VDD33 latched at POR Bit1: PA9 input value on VDD33 latched at POR Bit0: PA8 input value on VDD33 latched at POR.

pub fn set_iobootval(&mut self, val: u8)

Bit3: PA11 input value on VDD33 latched at POR Bit2: PA10 input value on VDD33 latched at POR Bit1: PA9 input value on VDD33 latched at POR Bit0: PA8 input value on VDD33 latched at POR.

Trait Implementations

impl Clone for Sr2

fn clone(&self) -> Sr2

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Sr2

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Sr2

fn default() -> Sr2

Returns the “default value” for a type.

impl PartialEq for Sr2

fn eq(&self, other: &Sr2) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Sr2

impl Eq for Sr2

impl StructuralPartialEq for Sr2