Struct stm32_metapac::adc::regs::Isr
#[repr(transparent)]pub struct Isr(pub u32);
Expand description
ADC interrupt and status register.
Tuple Fields§
§0: u32
Implementations§
§impl Isr
impl Isr
pub const fn adrdy(&self) -> bool
pub const fn adrdy(&self) -> bool
ADC ready This bit is set by hardware after the ADC has been enabled (ADEN = 1) and when the ADC reaches a state where it is ready to accept conversion requests. It is cleared by software writing 1 to it.
pub fn set_adrdy(&mut self, val: bool)
pub fn set_adrdy(&mut self, val: bool)
ADC ready This bit is set by hardware after the ADC has been enabled (ADEN = 1) and when the ADC reaches a state where it is ready to accept conversion requests. It is cleared by software writing 1 to it.
pub const fn eosmp(&self) -> bool
pub const fn eosmp(&self) -> bool
End of sampling flag This bit is set by hardware during the conversion, at the end of the sampling phase.It is cleared by software by writing 1 to it.
pub fn set_eosmp(&mut self, val: bool)
pub fn set_eosmp(&mut self, val: bool)
End of sampling flag This bit is set by hardware during the conversion, at the end of the sampling phase.It is cleared by software by writing 1 to it.
pub const fn eoc(&self) -> bool
pub const fn eoc(&self) -> bool
End of conversion flag This bit is set by hardware at the end of each conversion of a channel when a new data result is available in the DR register. It is cleared by software writing 1 to it or by reading the ADC_DR register.
pub fn set_eoc(&mut self, val: bool)
pub fn set_eoc(&mut self, val: bool)
End of conversion flag This bit is set by hardware at the end of each conversion of a channel when a new data result is available in the DR register. It is cleared by software writing 1 to it or by reading the ADC_DR register.
pub const fn eos(&self) -> bool
pub const fn eos(&self) -> bool
End of sequence flag This bit is set by hardware at the end of the conversion of a sequence of channels selected by the CHSEL bits. It is cleared by software writing 1 to it.
pub fn set_eos(&mut self, val: bool)
pub fn set_eos(&mut self, val: bool)
End of sequence flag This bit is set by hardware at the end of the conversion of a sequence of channels selected by the CHSEL bits. It is cleared by software writing 1 to it.
pub const fn ovr(&self) -> bool
pub const fn ovr(&self) -> bool
ADC overrun This bit is set by hardware when an overrun occurs, meaning that a new conversion has complete while the EOC flag was already set. It is cleared by software writing 1 to it.
pub fn set_ovr(&mut self, val: bool)
pub fn set_ovr(&mut self, val: bool)
ADC overrun This bit is set by hardware when an overrun occurs, meaning that a new conversion has complete while the EOC flag was already set. It is cleared by software writing 1 to it.
pub const fn awd(&self, n: usize) -> bool
pub const fn awd(&self, n: usize) -> bool
Analog watchdog 1 flag This bit is set by hardware when the converted voltage crosses the values programmed in TR1 and ADC_HR1 registers. It is cleared by software by writing 1 to it.
pub fn set_awd(&mut self, n: usize, val: bool)
pub fn set_awd(&mut self, n: usize, val: bool)
Analog watchdog 1 flag This bit is set by hardware when the converted voltage crosses the values programmed in TR1 and ADC_HR1 registers. It is cleared by software by writing 1 to it.
pub const fn eocal(&self) -> bool
pub const fn eocal(&self) -> bool
End of calibration flag This bit is set by hardware when calibration is complete. It is cleared by software writing 1 to it.
pub fn set_eocal(&mut self, val: bool)
pub fn set_eocal(&mut self, val: bool)
End of calibration flag This bit is set by hardware when calibration is complete. It is cleared by software writing 1 to it.
pub const fn ldordy(&self) -> bool
pub const fn ldordy(&self) -> bool
LDO ready This bit is set by hardware. It indicates that the ADC internal LDO output is ready. It is cleared by software by writing 1 to it.
pub fn set_ldordy(&mut self, val: bool)
pub fn set_ldordy(&mut self, val: bool)
LDO ready This bit is set by hardware. It indicates that the ADC internal LDO output is ready. It is cleared by software by writing 1 to it.
Trait Implementations§
impl Copy for Isr
impl Eq for Isr
impl StructuralPartialEq for Isr
Auto Trait Implementations§
impl Freeze for Isr
impl RefUnwindSafe for Isr
impl Send for Isr
impl Sync for Isr
impl Unpin for Isr
impl UnwindSafe for Isr
Blanket Implementations§
source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
source§impl<T> CloneToUninit for Twhere
T: Clone,
impl<T> CloneToUninit for Twhere
T: Clone,
source§unsafe fn clone_to_uninit(&self, dst: *mut T)
unsafe fn clone_to_uninit(&self, dst: *mut T)
clone_to_uninit
)