Module stm32_metapac::rcc::regs

Structs

• Ahb1enr
  AHB1 peripheral clock enable register
• Ahb1rstr
  AHB1 peripheral reset register
• Ahb1smenr
  AHB1 peripheral clocks enable in Sleep modes register
• Ahb2enr
  AHB2 peripheral clock enable register
• Ahb2rstr
  AHB2 peripheral reset register
• Ahb2smenr
  AHB2 peripheral clocks enable in Sleep modes register
• Ahb3enr
  AHB3 peripheral clock enable register
• Ahb3rstr
  AHB3 peripheral reset register
• Ahb3smenr
  AHB3 peripheral clocks enable in Sleep and Stop modes register
• Apb1enr1
  APB1 peripheral clock enable register 1
• Apb1enr2
  APB1 peripheral clock enable register 2
• Apb1rstr1
  APB1 peripheral reset register 1
• Apb1rstr2
  APB1 peripheral reset register 2
• Apb1smenr1
  APB1 peripheral clocks enable in Sleep mode register 1
• Apb1smenr2
  APB1 peripheral clocks enable in Sleep mode register 2
• Apb2enr
  APB2 peripheral clock enable register
• Apb2rstr
  APB2 peripheral reset register
• Apb2smenr
  APB2 peripheral clocks enable in Sleep mode register
• Apb3enr
  APB3 peripheral clock enable register
• Apb3rstr
  APB3 peripheral reset register
• Apb3smenr
  APB3 peripheral clock enable in Sleep mode register
• Bdcr
  Backup domain control register
• C2ahb1enr
  CPU2 AHB1 peripheral clock enable register
• C2ahb1smenr
  CPU2 AHB1 peripheral clocks enable in Sleep modes register [dual core device only]
• C2ahb2enr
  CPU2 AHB2 peripheral clock enable register
• C2ahb2smenr
  CPU2 AHB2 peripheral clocks enable in Sleep modes register [dual core device only]
• C2ahb3enr
  CPU2 AHB3 peripheral clock enable register [dual core device only]
• C2ahb3smenr
  CPU2 AHB3 peripheral clocks enable in Sleep mode register [dual core device only]
• C2apb1enr1
  CPU2 APB1 peripheral clock enable register 1 [dual core device only]
• C2apb1enr2
  CPU2 APB1 peripheral clock enable register 2 [dual core device only]
• C2apb1smenr1
  CPU2 APB1 peripheral clocks enable in Sleep mode register 1 [dual core device only]
• C2apb1smenr2
  CPU2 APB1 peripheral clocks enable in Sleep mode register 2 [dual core device only]
• C2apb2enr
  CPU2 APB2 peripheral clock enable register [dual core device only]
• C2apb2smenr
  CPU2 APB2 peripheral clocks enable in Sleep mode register [dual core device only]
• C2apb3enr
  CPU2 APB3 peripheral clock enable register [dual core device only]
• C2apb3smenr
  CPU2 APB3 peripheral clock enable in Sleep mode register [dual core device only]
• Ccipr
  Peripherals independent clock configuration register
• Cfgr
  Clock configuration register
• Cicr
  Clock interrupt clear register
• Cier
  Clock interrupt enable register
• Cifr
  Clock interrupt flag register
• Cr
  Clock control register
• Csr
  Control/status register
• Extcfgr
  Extended clock recovery register
• Icscr
  Internal clock sources calibration register
• Pllcfgr
  PLL configuration register