Struct stm32_metapac::rcc::Rcc

pub struct Rcc { /* private fields */ }

Reset and clock control

Implementations

impl Rcc

pub const unsafe fn from_ptr(ptr: *mut ()) -> Self

pub const fn as_ptr(&self) -> *mut ()

pub const fn cr(self) -> Reg<Cr, RW>

Clock control register

pub const fn icscr(self) -> Reg<Icscr, RW>

Internal clock sources calibration register

pub const fn cfgr(self) -> Reg<Cfgr, RW>

Clock configuration register

pub const fn pllcfgr(self) -> Reg<Pllcfgr, RW>

PLL configuration register

pub const fn cier(self) -> Reg<Cier, RW>

Clock interrupt enable register

pub const fn cifr(self) -> Reg<Cifr, R>

Clock interrupt flag register

pub const fn cicr(self) -> Reg<Cicr, W>

Clock interrupt clear register

pub const fn ahb1rstr(self) -> Reg<Ahb1rstr, RW>

AHB1 peripheral reset register

pub const fn ahb2rstr(self) -> Reg<Ahb2rstr, RW>

AHB2 peripheral reset register

pub const fn ahb3rstr(self) -> Reg<Ahb3rstr, RW>

AHB3 peripheral reset register

pub const fn apb1rstr1(self) -> Reg<Apb1rstr1, RW>

APB1 peripheral reset register 1

pub const fn apb1rstr2(self) -> Reg<Apb1rstr2, RW>

APB1 peripheral reset register 2

pub const fn apb2rstr(self) -> Reg<Apb2rstr, RW>

APB2 peripheral reset register

pub const fn apb3rstr(self) -> Reg<Apb3rstr, RW>

APB3 peripheral reset register

pub const fn ahb1enr(self) -> Reg<Ahb1enr, RW>

AHB1 peripheral clock enable register

pub const fn ahb2enr(self) -> Reg<Ahb2enr, RW>

AHB2 peripheral clock enable register

pub const fn ahb3enr(self) -> Reg<Ahb3enr, RW>

AHB3 peripheral clock enable register

pub const fn apb1enr1(self) -> Reg<Apb1enr1, RW>

APB1 peripheral clock enable register 1

pub const fn apb1enr2(self) -> Reg<Apb1enr2, RW>

APB1 peripheral clock enable register 2

pub const fn apb2enr(self) -> Reg<Apb2enr, RW>

APB2 peripheral clock enable register

pub const fn apb3enr(self) -> Reg<Apb3enr, RW>

APB3 peripheral clock enable register

pub const fn ahb1smenr(self) -> Reg<Ahb1smenr, RW>

AHB1 peripheral clocks enable in Sleep modes register

pub const fn ahb2smenr(self) -> Reg<Ahb2smenr, RW>

AHB2 peripheral clocks enable in Sleep modes register

pub const fn ahb3smenr(self) -> Reg<Ahb3smenr, RW>

AHB3 peripheral clocks enable in Sleep and Stop modes register

pub const fn apb1smenr1(self) -> Reg<Apb1smenr1, RW>

APB1 peripheral clocks enable in Sleep mode register 1

pub const fn apb1smenr2(self) -> Reg<Apb1smenr2, RW>

APB1 peripheral clocks enable in Sleep mode register 2

pub const fn apb2smenr(self) -> Reg<Apb2smenr, RW>

APB2 peripheral clocks enable in Sleep mode register

pub const fn apb3smenr(self) -> Reg<Apb3smenr, RW>

APB3 peripheral clock enable in Sleep mode register

pub const fn ccipr(self) -> Reg<Ccipr, RW>

Peripherals independent clock configuration register

pub const fn bdcr(self) -> Reg<Bdcr, RW>

Backup domain control register

pub const fn csr(self) -> Reg<Csr, RW>

Control/status register

pub const fn extcfgr(self) -> Reg<Extcfgr, RW>

Extended clock recovery register

pub const fn c2ahb1enr(self) -> Reg<C2ahb1enr, RW>

CPU2 AHB1 peripheral clock enable register

pub const fn c2ahb2enr(self) -> Reg<C2ahb2enr, RW>

CPU2 AHB2 peripheral clock enable register

pub const fn c2ahb3enr(self) -> Reg<C2ahb3enr, RW>

CPU2 AHB3 peripheral clock enable register [dual core device only]

pub const fn c2apb1enr1(self) -> Reg<C2apb1enr1, RW>

CPU2 APB1 peripheral clock enable register 1 [dual core device only]

pub const fn c2apb1enr2(self) -> Reg<C2apb1enr2, RW>

CPU2 APB1 peripheral clock enable register 2 [dual core device only]

pub const fn c2apb2enr(self) -> Reg<C2apb2enr, RW>

CPU2 APB2 peripheral clock enable register [dual core device only]

pub const fn c2apb3enr(self) -> Reg<C2apb3enr, RW>

CPU2 APB3 peripheral clock enable register [dual core device only]

pub const fn c2ahb1smenr(self) -> Reg<C2ahb1smenr, RW>

CPU2 AHB1 peripheral clocks enable in Sleep modes register [dual core device only]

pub const fn c2ahb2smenr(self) -> Reg<C2ahb2smenr, RW>

CPU2 AHB2 peripheral clocks enable in Sleep modes register [dual core device only]

pub const fn c2ahb3smenr(self) -> Reg<C2ahb3smenr, RW>

CPU2 AHB3 peripheral clocks enable in Sleep mode register [dual core device only]

pub const fn c2apb1smenr1(self) -> Reg<C2apb1smenr1, RW>

CPU2 APB1 peripheral clocks enable in Sleep mode register 1 [dual core device only]

pub const fn c2apb1smenr2(self) -> Reg<C2apb1smenr2, RW>

CPU2 APB1 peripheral clocks enable in Sleep mode register 2 [dual core device only]

pub const fn c2apb2smenr(self) -> Reg<C2apb2smenr, RW>

CPU2 APB2 peripheral clocks enable in Sleep mode register [dual core device only]

pub const fn c2apb3smenr(self) -> Reg<C2apb3smenr, RW>

CPU2 APB3 peripheral clock enable in Sleep mode register [dual core device only]

Trait Implementations

impl Clone for Rcc

fn clone(&self) -> Rcc

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl PartialEq for Rcc

fn eq(&self, other: &Rcc) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Rcc

impl Eq for Rcc

impl Send for Rcc

impl StructuralPartialEq for Rcc

impl Sync for Rcc