embassy-rp

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rp2040

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embassy_rp

Module rom_data

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//! Functions and data from the RPI Bootrom. //! //! From the RP2040 datasheet, Section 2.8.2.1: //! //! > The Bootrom contains a number of public functions that provide useful //! > RP2040 functionality that might be needed in the absence of any other code //! > on the device, as well as highly optimized versions of certain key //! > functionality that would otherwise have to take up space in most user //! > binaries.

Modules§

  • Additional access for the clz32 ROM function.
  • Additional access for the connect_internal_flash ROM function.
  • Additional access for the ctz32 ROM function.
  • Functions using double-precision arithmetic (i.e. ‘f64’ in Rust terms)
  • Additional access for the flash_enter_cmd_xip ROM function.
  • Additional access for the flash_exit_xip ROM function.
  • Additional access for the flash_flush_cache ROM function.
  • Additional access for the flash_range_erase ROM function.
  • Additional access for the flash_range_program ROM function.
  • ROM functions using single-precision arithmetic (i.e. ‘f32’ in Rust terms)
  • Additional access for the memcpy ROM function.
  • Additional access for the memcpy44 ROM function.
  • Additional access for the memset ROM function.
  • Additional access for the memset4 ROM function.
  • Additional access for the popcount32 ROM function.
  • Additional access for the reset_to_usb_boot ROM function.
  • Additional access for the reverse32 ROM function.
  • Additional access for the wait_for_vector ROM function.

Functions§

  • Return the number of consecutive high order 0 bits of value. If value is zero, returns 32.
  • Restore all QSPI pad controls to their default state, and connect the SSI to the QSPI pads.
  • The Raspberry Pi Trading Ltd copyright string.
  • Return the number of consecutive low order 0 bits of value. If value is zero, returns 32.
  • Configure the SSI to generate a standard 03h serial read command, with 24 address bits, upon each XIP access. This is a very slow XIP configuration, but is very widely supported. The debugger calls this function after performing a flash erase/programming operation, so that the freshly-programmed code and data is visible to the debug host, without having to know exactly what kind of flash device is connected.
  • First set up the SSI for serial-mode operations, then issue the fixed XIP exit sequence.
  • Flush and enable the XIP cache. Also clears the IO forcing on QSPI CSn, so that the SSI can drive the flashchip select as normal.
  • Erase a count bytes, starting at addr (offset from start of flash). Optionally, pass a block erase command e.g. D8h block erase, and the size of the block erased by this command — this function will use the larger block erase where possible, for much higher erase speed. addr must be aligned to a 4096-byte sector, and count must be a multiple of 4096 bytes.
  • Program data to a range of flash addresses starting at addr (and offset from the start of flash) and count bytes in size. The value addr must be aligned to a 256-byte boundary, and count must be a multiple of 256.
  • The end address of the floating point library code and data.
  • The start address of the floating point library code and data.
  • The 8 most significant hex digits of the Bootrom git revision.
  • Copies n bytes starting at src to dest and returns dest. The results are undefined if the regions overlap.
  • Copies n bytes starting at src to dest and returns dest. The results are undefined if the regions overlap.
  • Sets n bytes start at ptr to the value c and returns ptr
  • Sets n bytes start at ptr to the value c and returns ptr.
  • Return a count of the number of 1 bits in value.
  • Resets the RP2040 and uses the watchdog facility to re-start in BOOTSEL mode:
  • Return the bits of value in the reverse order.
  • The version number of the rom.
  • This entry is only present in the V2 bootrom. See Table 182 in the RP2040 datasheet for the contents of this table.
  • See Table 180 in the RP2040 datasheet for the contents of this table.
  • This is the method that is entered by core 1 on reset to wait to be launched by core 0. There are few cases where you should call this method (resetting core 1 is much better). This method does not return and should only ever be called on core 1.

Type Aliases§