Struct Spi

pub struct Spi<'d, T: Instance, M: Mode> { /* private fields */ }

SPI driver.

Implementations

impl<'d, T: Instance, M: Mode> Spi<'d, T, M>

pub fn blocking_write(&mut self, data: &[u8]) -> Result<(), Error>

Write data to SPI blocking execution until done.

pub fn blocking_transfer_in_place( &mut self, data: &mut [u8], ) -> Result<(), Error>

Transfer data in place to SPI blocking execution until done.

pub fn blocking_read(&mut self, data: &mut [u8]) -> Result<(), Error>

Read data from SPI blocking execution until done.

pub fn blocking_transfer( &mut self, read: &mut [u8], write: &[u8], ) -> Result<(), Error>

Transfer data to SPI blocking execution until done.

pub fn flush(&mut self) -> Result<(), Error>

Block execution until SPI is done.

pub fn set_frequency(&mut self, freq: u32)

Set SPI frequency.

pub fn set_config(&mut self, config: &Config)

Set SPI config.

impl<'d, T: Instance> Spi<'d, T, Blocking>

pub fn new_blocking( inner: impl Peripheral<P = T> + 'd, clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd, mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd, miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd, config: Config, ) -> Self

Create an SPI driver in blocking mode.

pub fn new_blocking_txonly( inner: impl Peripheral<P = T> + 'd, clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd, mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd, config: Config, ) -> Self

Create an SPI driver in blocking mode supporting writes only.

pub fn new_blocking_rxonly( inner: impl Peripheral<P = T> + 'd, clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd, miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd, config: Config, ) -> Self

Create an SPI driver in blocking mode supporting reads only.

impl<'d, T: Instance> Spi<'d, T, Async>

pub fn new( inner: impl Peripheral<P = T> + 'd, clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd, mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd, miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd, tx_dma: impl Peripheral<P = impl Channel> + 'd, rx_dma: impl Peripheral<P = impl Channel> + 'd, config: Config, ) -> Self

Create an SPI driver in async mode supporting DMA operations.

pub fn new_txonly( inner: impl Peripheral<P = T> + 'd, clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd, mosi: impl Peripheral<P = impl MosiPin<T> + 'd> + 'd, tx_dma: impl Peripheral<P = impl Channel> + 'd, config: Config, ) -> Self

Create an SPI driver in async mode supporting DMA write operations only.

pub fn new_rxonly( inner: impl Peripheral<P = T> + 'd, clk: impl Peripheral<P = impl ClkPin<T> + 'd> + 'd, miso: impl Peripheral<P = impl MisoPin<T> + 'd> + 'd, tx_dma: impl Peripheral<P = impl Channel> + 'd, rx_dma: impl Peripheral<P = impl Channel> + 'd, config: Config, ) -> Self

Create an SPI driver in async mode supporting DMA read operations only.

pub async fn write(&mut self, buffer: &[u8]) -> Result<(), Error>

Write data to SPI using DMA.

pub async fn read(&mut self, buffer: &mut [u8]) -> Result<(), Error>

Read data from SPI using DMA.

pub async fn transfer( &mut self, rx_buffer: &mut [u8], tx_buffer: &[u8], ) -> Result<(), Error>

Transfer data to SPI using DMA.

pub async fn transfer_in_place(&mut self, words: &mut [u8]) -> Result<(), Error>

Transfer data in place to SPI using DMA.

Trait Implementations

impl<'d, T: Instance, M: Mode> ErrorType for Spi<'d, T, M>

type Error = Error

Error type.

impl<'d, T: Instance, M: Mode> SetConfig for Spi<'d, T, M>

type Config = Config

The configuration type used by this driver.

type ConfigError = ()

The error type that can occur if set_config fails.

fn set_config(&mut self, config: &Self::Config) -> Result<(), ()>

Set the configuration of the driver.

impl<'d, T: Instance> SpiBus for Spi<'d, T, Async>

async fn flush(&mut self) -> Result<(), Self::Error>

Wait until all operations have completed and the bus is idle.

async fn write(&mut self, words: &[u8]) -> Result<(), Self::Error>

Write words to the slave, ignoring all the incoming words.

async fn read(&mut self, words: &mut [u8]) -> Result<(), Self::Error>

Read words from the slave.

async fn transfer( &mut self, read: &mut [u8], write: &[u8], ) -> Result<(), Self::Error>

Write and read simultaneously. write is written to the slave on MOSI and words received on MISO are stored in read.

async fn transfer_in_place( &mut self, words: &mut [u8], ) -> Result<(), Self::Error>

Write and read simultaneously. The contents of words are written to the slave, and the received words are stored into the same words buffer, overwriting it.

impl<'d, T: Instance, M: Mode> SpiBus for Spi<'d, T, M>

fn flush(&mut self) -> Result<(), Self::Error>

Wait until all operations have completed and the bus is idle.

fn read(&mut self, words: &mut [u8]) -> Result<(), Self::Error>

Read words from the slave.

fn write(&mut self, words: &[u8]) -> Result<(), Self::Error>

Write words to the slave, ignoring all the incoming words.

fn transfer(&mut self, read: &mut [u8], write: &[u8]) -> Result<(), Self::Error>

Write and read simultaneously. write is written to the slave on MOSI and words received on MISO are stored in read.

fn transfer_in_place(&mut self, words: &mut [u8]) -> Result<(), Self::Error>

Write and read simultaneously. The contents of words are written to the slave, and the received words are stored into the same words buffer, overwriting it.

impl<'d, T: Instance, M: Mode> Transfer<u8> for Spi<'d, T, M>

type Error = Error

Error type

fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error>

Sends words to the slave. Returns the words received from the slave

impl<'d, T: Instance, M: Mode> Write<u8> for Spi<'d, T, M>

type Error = Error

Error type

fn write(&mut self, words: &[u8]) -> Result<(), Self::Error>

Sends words to the slave, ignoring all the incoming words