Struct Adc 

pub struct Adc<'d, M: Mode> { /* private fields */ }

ADC driver.

Implementations

impl<'d, M: Mode> Adc<'d, M>

pub fn blocking_read(&mut self, ch: &mut Channel<'_>) -> Result<u16, Error>

Sample a value from a channel in blocking mode.

impl<'d> Adc<'d, Async>

pub fn new( _inner: Peri<'d, ADC>, _irq: impl Binding<ADC_IRQ_FIFO, InterruptHandler>, _config: Config, ) -> Self

Create ADC driver in async mode.

pub async fn read(&mut self, ch: &mut Channel<'_>) -> Result<u16, Error>

Sample a value from a channel until completed.

pub async fn read_many_multichannel<S: AdcSample>( &mut self, ch: &mut [Channel<'_>], buf: &mut [S], div: u16, dma: &mut Channel<'_, Async>, ) -> Result<(), Error>

Sample multiple values from multiple channels using DMA. Samples are stored in an interleaved fashion inside the buffer. div is the integer part of the clock divider and can be calculated with floor(48MHz / sample_rate * num_channels - 1) Any div value of less than 96 will have the same effect as setting it to 0

pub async fn read_many_multichannel_raw( &mut self, ch: &mut [Channel<'_>], buf: &mut [Sample], div: u16, dma: &mut Channel<'_, Async>, )

Sample multiple values from multiple channels using DMA, with errors inlined in samples. Samples are stored in an interleaved fashion inside the buffer. div is the integer part of the clock divider and can be calculated with floor(48MHz / sample_rate * num_channels - 1) Any div value of less than 96 will have the same effect as setting it to 0

pub async fn read_many<S: AdcSample>( &mut self, ch: &mut Channel<'_>, buf: &mut [S], div: u16, dma: &mut Channel<'_, Async>, ) -> Result<(), Error>

Sample multiple values from a channel using DMA. div is the integer part of the clock divider and can be calculated with floor(48MHz / sample_rate - 1) Any div value of less than 96 will have the same effect as setting it to 0

pub async fn read_many_raw( &mut self, ch: &mut Channel<'_>, buf: &mut [Sample], div: u16, dma: &mut Channel<'_, Async>, )

Sample multiple values from a channel using DMA, with errors inlined in samples. div is the integer part of the clock divider and can be calculated with floor(48MHz / sample_rate - 1) Any div value of less than 96 will have the same effect as setting it to 0

impl<'d> Adc<'d, Blocking>

pub fn new_blocking(_inner: Peri<'d, ADC>, _config: Config) -> Self

Create ADC driver in blocking mode.

Trait Implementations

impl<'d, M: Mode> Drop for Adc<'d, M>

fn drop(&mut self)

Executes the destructor for this type.

fn pin_drop(self: Pin<&mut Self>)

🔬This is a nightly-only experimental API. (pin_ergonomics)

Execute the destructor for this type, but different to Drop::drop, it requires self to be pinned.