Enum embassy_rp::interrupt::Interrupt

pub enum Interrupt {
    TIMER0_IRQ_0 = 0,
    TIMER0_IRQ_1 = 1,
    TIMER0_IRQ_2 = 2,
    TIMER0_IRQ_3 = 3,
    TIMER1_IRQ_0 = 4,
    TIMER1_IRQ_1 = 5,
    TIMER1_IRQ_2 = 6,
    TIMER1_IRQ_3 = 7,
    PWM_IRQ_WRAP_0 = 8,
    PWM_IRQ_WRAP_1 = 9,
    DMA_IRQ_0 = 10,
    DMA_IRQ_1 = 11,
    DMA_IRQ_2 = 12,
    DMA_IRQ_3 = 13,
    USBCTRL_IRQ = 14,
    PIO0_IRQ_0 = 15,
    PIO0_IRQ_1 = 16,
    PIO1_IRQ_0 = 17,
    PIO1_IRQ_1 = 18,
    PIO2_IRQ_0 = 19,
    PIO2_IRQ_1 = 20,
    IO_IRQ_BANK0 = 21,
    IO_IRQ_BANK0_NS = 22,
    IO_IRQ_QSPI = 23,
    IO_IRQ_QSPI_NS = 24,
    SIO_IRQ_FIFO = 25,
    SIO_IRQ_BELL = 26,
    SIO_IRQ_FIFO_NS = 27,
    SIO_IRQ_BELL_NS = 28,
    SIO_IRQ_MTIMECMP = 29,
    CLOCKS_IRQ = 30,
    SPI0_IRQ = 31,
    SPI1_IRQ = 32,
    UART0_IRQ = 33,
    UART1_IRQ = 34,
    ADC_IRQ_FIFO = 35,
    I2C0_IRQ = 36,
    I2C1_IRQ = 37,
    OTP_IRQ = 38,
    TRNG_IRQ = 39,
    PLL_SYS_IRQ = 42,
    PLL_USB_IRQ = 43,
    POWMAN_IRQ_POW = 44,
    POWMAN_IRQ_TIMER = 45,
    SWI_IRQ_0 = 47,
    SWI_IRQ_1 = 48,
    SWI_IRQ_2 = 49,
    SWI_IRQ_3 = 50,
    SWI_IRQ_4 = 51,
    SWI_IRQ_5 = 52,
}

Variants

TIMER0_IRQ_0 = 0

0 - TIMER0_IRQ_0

TIMER0_IRQ_1 = 1

1 - TIMER0_IRQ_1

TIMER0_IRQ_2 = 2

2 - TIMER0_IRQ_2

TIMER0_IRQ_3 = 3

3 - TIMER0_IRQ_3

TIMER1_IRQ_0 = 4

4 - TIMER1_IRQ_0

TIMER1_IRQ_1 = 5

5 - TIMER1_IRQ_1

TIMER1_IRQ_2 = 6

6 - TIMER1_IRQ_2

TIMER1_IRQ_3 = 7

7 - TIMER1_IRQ_3

PWM_IRQ_WRAP_0 = 8

8 - PWM_IRQ_WRAP_0

PWM_IRQ_WRAP_1 = 9

9 - PWM_IRQ_WRAP_1

DMA_IRQ_0 = 10

10 - DMA_IRQ_0

DMA_IRQ_1 = 11

11 - DMA_IRQ_1

DMA_IRQ_2 = 12

12 - DMA_IRQ_2

DMA_IRQ_3 = 13

13 - DMA_IRQ_3

USBCTRL_IRQ = 14

14 - USBCTRL_IRQ

PIO0_IRQ_0 = 15

15 - PIO0_IRQ_0

PIO0_IRQ_1 = 16

16 - PIO0_IRQ_1

PIO1_IRQ_0 = 17

17 - PIO1_IRQ_0

PIO1_IRQ_1 = 18

18 - PIO1_IRQ_1

PIO2_IRQ_0 = 19

19 - PIO2_IRQ_0

PIO2_IRQ_1 = 20

20 - PIO2_IRQ_1

IO_IRQ_BANK0 = 21

21 - IO_IRQ_BANK0

IO_IRQ_BANK0_NS = 22

22 - IO_IRQ_BANK0_NS

IO_IRQ_QSPI = 23

23 - IO_IRQ_QSPI

IO_IRQ_QSPI_NS = 24

24 - IO_IRQ_QSPI_NS

SIO_IRQ_FIFO = 25

25 - SIO_IRQ_FIFO

SIO_IRQ_BELL = 26

26 - SIO_IRQ_BELL

SIO_IRQ_FIFO_NS = 27

27 - SIO_IRQ_FIFO_NS

SIO_IRQ_BELL_NS = 28

28 - SIO_IRQ_BELL_NS

SIO_IRQ_MTIMECMP = 29

29 - SIO_IRQ_MTIMECMP

CLOCKS_IRQ = 30

30 - CLOCKS_IRQ

SPI0_IRQ = 31

31 - SPI0_IRQ

SPI1_IRQ = 32

32 - SPI1_IRQ

UART0_IRQ = 33

33 - UART0_IRQ

UART1_IRQ = 34

34 - UART1_IRQ

ADC_IRQ_FIFO = 35

35 - ADC_IRQ_FIFO

I2C0_IRQ = 36

36 - I2C0_IRQ

I2C1_IRQ = 37

37 - I2C1_IRQ

OTP_IRQ = 38

38 - OTP_IRQ

TRNG_IRQ = 39

39 - TRNG_IRQ

PLL_SYS_IRQ = 42

42 - PLL_SYS_IRQ

PLL_USB_IRQ = 43

43 - PLL_USB_IRQ

POWMAN_IRQ_POW = 44

44 - POWMAN_IRQ_POW

POWMAN_IRQ_TIMER = 45

45 - POWMAN_IRQ_TIMER

SWI_IRQ_0 = 47

47 - SWI_IRQ_0

SWI_IRQ_1 = 48

48 - SWI_IRQ_1

SWI_IRQ_2 = 49

49 - SWI_IRQ_2

SWI_IRQ_3 = 50

50 - SWI_IRQ_3

SWI_IRQ_4 = 51

51 - SWI_IRQ_4

SWI_IRQ_5 = 52

52 - SWI_IRQ_5

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result<(), Error>

Formats the value using the given formatter.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralPartialEq for Interrupt