Struct Extsilenten 

#[repr(transparent)]
pub struct Extsilenten(pub u32);

When VREGH is in DC/DC mode, enable VREGH silent mode to supply external components from VDD. Silent mode has lower voltage ripple. Silent mode is used when DC/DC is enabled, and is ignored in LDO mode. Disabling silent mode reduces current consumption in sleep.

Tuple Fields

0: u32

Implementations

impl Extsilenten

pub const fn extsilenten(&self) -> bool

Enable silent external DC/DC supply

pub const fn set_extsilenten(&mut self, val: bool)

Enable silent external DC/DC supply

Trait Implementations

impl Clone for Extsilenten

fn clone(&self) -> Extsilenten

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Extsilenten

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Extsilenten

fn default() -> Extsilenten

Returns the “default value” for a type.

impl PartialEq for Extsilenten

fn eq(&self, other: &Extsilenten) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Extsilenten

impl Eq for Extsilenten

impl StructuralPartialEq for Extsilenten