Struct stm32_metapac::rcc::regs::Csr1

#[repr(transparent)]
pub struct Csr1(pub u32);

RCC control/status register 1

Tuple Fields

0: u32

Implementations

impl Csr1

pub const fn lseon(&self) -> bool

LSE oscillator enable Set and cleared by software to enable LSE oscillator:

pub fn set_lseon(&mut self, val: bool)

LSE oscillator enable Set and cleared by software to enable LSE oscillator:

pub const fn lserdy(&self) -> bool

LSE oscillator ready Set and cleared by hardware to indicate when the external 32 kHz oscillator is ready (stable): After the LSEON bit is cleared, LSERDY goes low after 6 external low-speed oscillator clock cycles.

pub fn set_lserdy(&mut self, val: bool)

LSE oscillator ready Set and cleared by hardware to indicate when the external 32 kHz oscillator is ready (stable): After the LSEON bit is cleared, LSERDY goes low after 6 external low-speed oscillator clock cycles.

pub const fn lsebyp(&self) -> bool

LSE oscillator bypass Set and cleared by software to bypass the LSE oscillator (in debug mode). This bit can be written only when the external 32 kHz oscillator is disabled (LSEON=0 and LSERDY=0).

pub fn set_lsebyp(&mut self, val: bool)

LSE oscillator bypass Set and cleared by software to bypass the LSE oscillator (in debug mode). This bit can be written only when the external 32 kHz oscillator is disabled (LSEON=0 and LSERDY=0).

pub const fn lsedrv(&self) -> Lsedrv

LSE oscillator drive capability Set by software to select the LSE oscillator drive capability as follows: Applicable when the LSE oscillator is in Xtal mode, as opposed to bypass mode.

pub fn set_lsedrv(&mut self, val: Lsedrv)

LSE oscillator drive capability Set by software to select the LSE oscillator drive capability as follows: Applicable when the LSE oscillator is in Xtal mode, as opposed to bypass mode.

pub const fn lsecsson(&self) -> bool

CSS on LSE enable Set by software to enable the clock security system on LSE (32 kHz) oscillator as follows: LSECSSON must be enabled after the LSE oscillator is enabled (LSEON bit enabled) and ready (LSERDY flag set by hardware), and after the RTCSEL bit is selected. Once enabled, this bit cannot be disabled, except after a LSE failure detection (LSECSSD =1). In that case the software must disable the LSECSSON bit.

pub fn set_lsecsson(&mut self, val: bool)

CSS on LSE enable Set by software to enable the clock security system on LSE (32 kHz) oscillator as follows: LSECSSON must be enabled after the LSE oscillator is enabled (LSEON bit enabled) and ready (LSERDY flag set by hardware), and after the RTCSEL bit is selected. Once enabled, this bit cannot be disabled, except after a LSE failure detection (LSECSSD =1). In that case the software must disable the LSECSSON bit.

pub const fn lsecssd(&self) -> bool

CSS on LSE failure Detection Set by hardware to indicate when a failure is detected by the clock security system on the external 32 kHz oscillator (LSE):

pub fn set_lsecssd(&mut self, val: bool)

CSS on LSE failure Detection Set by hardware to indicate when a failure is detected by the clock security system on the external 32 kHz oscillator (LSE):

pub const fn rtcsel(&self) -> Rtcsel

RTC clock source selection Set by software to select the clock source for the RTC as follows: Once the RTC clock source is selected, it cannot be changed anymore unless the RTC domain is reset, or unless a failure is detected on LSE (LSECSSD is set). The RTCRST bit can be used to reset this bitfield to 00.

pub fn set_rtcsel(&mut self, val: Rtcsel)

RTC clock source selection Set by software to select the clock source for the RTC as follows: Once the RTC clock source is selected, it cannot be changed anymore unless the RTC domain is reset, or unless a failure is detected on LSE (LSECSSD is set). The RTCRST bit can be used to reset this bitfield to 00.

pub const fn rtcen(&self) -> bool

RTC clock enable Set and cleared by software. The bit enables clock to RTC and TAMP.

pub fn set_rtcen(&mut self, val: bool)

RTC clock enable Set and cleared by software. The bit enables clock to RTC and TAMP.

pub const fn rtcrst(&self) -> bool

RTC domain software reset Set and cleared by software to reset the RTC domain:

pub fn set_rtcrst(&mut self, val: bool)

RTC domain software reset Set and cleared by software to reset the RTC domain:

pub const fn lscoen(&self) -> bool

Low-speed clock output (LSCO) enable Set and cleared by software.

pub fn set_lscoen(&mut self, val: bool)

Low-speed clock output (LSCO) enable Set and cleared by software.

pub const fn lscosel(&self) -> Lscosel

Low-speed clock output selection Set and cleared by software to select the low-speed output clock:

pub fn set_lscosel(&mut self, val: Lscosel)

Low-speed clock output selection Set and cleared by software to select the low-speed output clock:

Trait Implementations

impl Clone for Csr1

fn clone(&self) -> Csr1

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Csr1

fn default() -> Csr1

Returns the “default value” for a type.

impl PartialEq for Csr1

fn eq(&self, other: &Csr1) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Csr1

impl Eq for Csr1

impl StructuralPartialEq for Csr1