Struct stm32_metapac::fmc::regs::Pcscntr

#[repr(transparent)]
pub struct Pcscntr(pub u32);

PSRAM chip select counter register.

Tuple Fields

0: u32

Implementations

impl Pcscntr

pub const fn cscount(&self) -> u16

Chip select counter. These bits are written by software to define the maximum chip select low pulse duration. It is expressed in FMC_CLK cycles for synchronous accesses and in HCLK cycles for asynchronous accesses. The counter is disabled if the programmed value is 0.

pub fn set_cscount(&mut self, val: u16)

Chip select counter. These bits are written by software to define the maximum chip select low pulse duration. It is expressed in FMC_CLK cycles for synchronous accesses and in HCLK cycles for asynchronous accesses. The counter is disabled if the programmed value is 0.

pub const fn cntben(&self, n: usize) -> bool

Counter Bank 1 enable This bit enables the chip select counter for PSRAM/NOR Bank 1.

pub fn set_cntben(&mut self, n: usize, val: bool)

Counter Bank 1 enable This bit enables the chip select counter for PSRAM/NOR Bank 1.

Trait Implementations

impl Clone for Pcscntr

fn clone(&self) -> Pcscntr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Pcscntr

fn default() -> Pcscntr

Returns the “default value” for a type.

impl PartialEq for Pcscntr

fn eq(&self, other: &Pcscntr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Pcscntr

impl Eq for Pcscntr

impl StructuralPartialEq for Pcscntr