Struct stm32_metapac::sdmmc::regs::Idmabase1r

#[repr(transparent)]
pub struct Idmabase1r(pub u32);

The SDMMC_IDMABASE1R register contains the double buffer configuration second buffer memory base address.

Tuple Fields

0: u32

Implementations

impl Idmabase1r

pub const fn idmabase1(&self) -> u32

Buffer 1 memory base address, shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0).

pub fn set_idmabase1(&mut self, val: u32)

Buffer 1 memory base address, shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 1 is inactive (IDMABACT = 0).

Trait Implementations

impl Clone for Idmabase1r

fn clone(&self) -> Idmabase1r

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Idmabase1r

fn default() -> Idmabase1r

Returns the “default value” for a type.

impl PartialEq for Idmabase1r

fn eq(&self, other: &Idmabase1r) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Idmabase1r

impl Eq for Idmabase1r

impl StructuralPartialEq for Idmabase1r