Struct stm32_metapac::sdmmc::regs::Star

#[repr(transparent)]
pub struct Star(pub u32);

The SDMMC_STAR register is a read-only register. It contains two types of flag:Static flags (bits [29,21,11:0]): these bits remain asserted until they are cleared by writing to the SDMMC interrupt Clear register (see SDMMC_ICR)Dynamic flags (bits [20:12]): these bits change state depending on the state of the underlying logic (for example, FIFO full and empty flags are asserted and de-asserted as data while written to the FIFO)

Tuple Fields

0: u32

Implementations

impl Star

pub const fn ccrcfail(&self) -> bool

Command response received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_ccrcfail(&mut self, val: bool)

Command response received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn dcrcfail(&self) -> bool

Data block sent/received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_dcrcfail(&mut self, val: bool)

Data block sent/received (CRC check failed). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn ctimeout(&self) -> bool

Command response timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR. The Command Timeout period has a fixed value of 64 SDMMC_CK clock periods.

pub fn set_ctimeout(&mut self, val: bool)

Command response timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR. The Command Timeout period has a fixed value of 64 SDMMC_CK clock periods.

pub const fn dtimeout(&self) -> bool

Data timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_dtimeout(&mut self, val: bool)

Data timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn txunderr(&self) -> bool

Transmit FIFO underrun error or IDMA read transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_txunderr(&mut self, val: bool)

Transmit FIFO underrun error or IDMA read transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn rxoverr(&self) -> bool

Received FIFO overrun error or IDMA write transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_rxoverr(&mut self, val: bool)

Received FIFO overrun error or IDMA write transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn cmdrend(&self) -> bool

Command response received (CRC check passed, or no CRC). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_cmdrend(&mut self, val: bool)

Command response received (CRC check passed, or no CRC). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn cmdsent(&self) -> bool

Command sent (no response required). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_cmdsent(&mut self, val: bool)

Command sent (no response required). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn dataend(&self) -> bool

Data transfer ended correctly. (data counter, DATACOUNT is zero and no errors occur). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_dataend(&mut self, val: bool)

Data transfer ended correctly. (data counter, DATACOUNT is zero and no errors occur). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn dhold(&self) -> bool

Data transfer Hold. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_dhold(&mut self, val: bool)

Data transfer Hold. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn dbckend(&self) -> bool

Data block sent/received. (CRC check passed) and DPSM moves to the READWAIT state. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_dbckend(&mut self, val: bool)

Data block sent/received. (CRC check passed) and DPSM moves to the READWAIT state. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn dabort(&self) -> bool

Data transfer aborted by CMD12. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_dabort(&mut self, val: bool)

Data transfer aborted by CMD12. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn dpsmact(&self) -> bool

Data path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt.

pub fn set_dpsmact(&mut self, val: bool)

Data path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt.

pub const fn cpsmact(&self) -> bool

Command path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt.

pub fn set_cpsmact(&mut self, val: bool)

Command path state machine active, i.e. not in Idle state. This is a hardware status flag only, does not generate an interrupt.

pub const fn txfifohe(&self) -> bool

Transmit FIFO half empty At least half the number of words can be written into the FIFO. This bit is cleared when the FIFO becomes half+1 full.

pub fn set_txfifohe(&mut self, val: bool)

Transmit FIFO half empty At least half the number of words can be written into the FIFO. This bit is cleared when the FIFO becomes half+1 full.

pub const fn rxfifohf(&self) -> bool

Receive FIFO half full There are at least half the number of words in the FIFO. This bit is cleared when the FIFO becomes half+1 empty.

pub fn set_rxfifohf(&mut self, val: bool)

Receive FIFO half full There are at least half the number of words in the FIFO. This bit is cleared when the FIFO becomes half+1 empty.

pub const fn txfifof(&self) -> bool

Transmit FIFO full This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes empty.

pub fn set_txfifof(&mut self, val: bool)

Transmit FIFO full This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes empty.

pub const fn rxfifof(&self) -> bool

Receive FIFO full This bit is cleared when one FIFO location becomes empty.

pub fn set_rxfifof(&mut self, val: bool)

Receive FIFO full This bit is cleared when one FIFO location becomes empty.

pub const fn txfifoe(&self) -> bool

Transmit FIFO empty This bit is cleared when one FIFO location becomes full.

pub fn set_txfifoe(&mut self, val: bool)

Transmit FIFO empty This bit is cleared when one FIFO location becomes full.

pub const fn rxfifoe(&self) -> bool

Receive FIFO empty This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes full.

pub fn set_rxfifoe(&mut self, val: bool)

Receive FIFO empty This is a hardware status flag only, does not generate an interrupt. This bit is cleared when one FIFO location becomes full.

pub const fn busyd0(&self) -> bool

Inverted value of SDMMC_D0 line (Busy), sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response. This bit is reset to not busy when the SDMMCD0 line changes from busy to not busy. This bit does not signal busy due to data transfer. This is a hardware status flag only, it does not generate an interrupt.

pub fn set_busyd0(&mut self, val: bool)

Inverted value of SDMMC_D0 line (Busy), sampled at the end of a CMD response and a second time 2 SDMMC_CK cycles after the CMD response. This bit is reset to not busy when the SDMMCD0 line changes from busy to not busy. This bit does not signal busy due to data transfer. This is a hardware status flag only, it does not generate an interrupt.

pub const fn busyd0end(&self) -> bool

end of SDMMC_D0 Busy following a CMD response detected. This indicates only end of busy following a CMD response. This bit does not signal busy due to data transfer. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_busyd0end(&mut self, val: bool)

end of SDMMC_D0 Busy following a CMD response detected. This indicates only end of busy following a CMD response. This bit does not signal busy due to data transfer. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn sdioit(&self) -> bool

SDIO interrupt received. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_sdioit(&mut self, val: bool)

SDIO interrupt received. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn ackfail(&self) -> bool

Boot acknowledgment received (boot acknowledgment check fail). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_ackfail(&mut self, val: bool)

Boot acknowledgment received (boot acknowledgment check fail). Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn acktimeout(&self) -> bool

Boot acknowledgment timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_acktimeout(&mut self, val: bool)

Boot acknowledgment timeout. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn vswend(&self) -> bool

Voltage switch critical timing section completion. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_vswend(&mut self, val: bool)

Voltage switch critical timing section completion. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn ckstop(&self) -> bool

SDMMC_CK stopped in Voltage switch procedure. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_ckstop(&mut self, val: bool)

SDMMC_CK stopped in Voltage switch procedure. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn idmate(&self) -> bool

IDMA transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_idmate(&mut self, val: bool)

IDMA transfer error. Interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub const fn idmabtc(&self) -> bool

IDMA buffer transfer complete. interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

pub fn set_idmabtc(&mut self, val: bool)

IDMA buffer transfer complete. interrupt flag is cleared by writing corresponding interrupt clear bit in SDMMC_ICR.

Trait Implementations

impl Clone for Star

fn clone(&self) -> Star

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Star

fn default() -> Star

Returns the “default value” for a type.

impl PartialEq for Star

fn eq(&self, other: &Star) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Star

impl Eq for Star

impl StructuralPartialEq for Star