Struct stm32_metapac::rcc::regs::Cdcfgr

#[repr(transparent)]
pub struct Cdcfgr(pub u32);

RCC CPU domain clock configuration register.

Tuple Fields

0: u32

Implementations

impl Cdcfgr

pub const fn cpre(&self) -> Hpre

CPU domain core prescaler Set and reset by software to control the CPU clock division factor. Changing this division ratio has an impact on the frequency of the CPU clock and all bus matrix clocks. After changing this prescaler value, it takes up to 16 periods of the slowest APB clock before the new division ratio is taken into account. The application can check if the new division factor is taken into account by reading back this register. 0xxx: sys_ck not divided (default after reset).

pub fn set_cpre(&mut self, val: Hpre)

CPU domain core prescaler Set and reset by software to control the CPU clock division factor. Changing this division ratio has an impact on the frequency of the CPU clock and all bus matrix clocks. After changing this prescaler value, it takes up to 16 periods of the slowest APB clock before the new division ratio is taken into account. The application can check if the new division factor is taken into account by reading back this register. 0xxx: sys_ck not divided (default after reset).

Trait Implementations

impl Clone for Cdcfgr

fn clone(&self) -> Cdcfgr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Cdcfgr

fn default() -> Cdcfgr

Returns the “default value” for a type.

impl PartialEq for Cdcfgr

fn eq(&self, other: &Cdcfgr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Cdcfgr

impl Eq for Cdcfgr

impl StructuralPartialEq for Cdcfgr