Struct stm32_metapac::pwr::regs::Csr4

#[repr(transparent)]
pub struct Csr4(pub u32);

PWR control status register 4.

Tuple Fields

0: u32

Implementations

impl Csr4

pub const fn vos(&self) -> Vos

Voltage scaling selection according to performance These bits control the V_CORE voltage level and allow to obtains the best trade-off between power consumption and performance: When increasing the performance, the voltage scaling must be changed before increasing the system frequency. When decreasing performance, the system frequency must first be decreased before changing the voltage scaling. Note: Refer to Section Electrical characteristics of the product datasheet for more details.

pub fn set_vos(&mut self, val: Vos)

Voltage scaling selection according to performance These bits control the V_CORE voltage level and allow to obtains the best trade-off between power consumption and performance: When increasing the performance, the voltage scaling must be changed before increasing the system frequency. When decreasing performance, the system frequency must first be decreased before changing the voltage scaling. Note: Refer to Section Electrical characteristics of the product datasheet for more details.

pub const fn vosrdy(&self) -> bool

VOS Ready bit.

pub fn set_vosrdy(&mut self, val: bool)

VOS Ready bit.

Trait Implementations

impl Clone for Csr4

fn clone(&self) -> Csr4

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Csr4

fn default() -> Csr4

Returns the “default value” for a type.

impl PartialEq for Csr4

fn eq(&self, other: &Csr4) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Csr4

impl Eq for Csr4

impl StructuralPartialEq for Csr4