Struct stm32_metapac::rcc::regs::Pllckselr

#[repr(transparent)]
pub struct Pllckselr(pub u32);

RCC PLLs clock source selection register.

Tuple Fields

0: u32

Implementations

impl Pllckselr

pub const fn pllsrc(&self) -> Pllsrc

DIVMx and PLLs clock source selection Set and reset by software to select the PLL clock source. These bits can be written only when all PLLs are disabled. In order to save power, when no PLL is used, PLLSRC must be set to 11.

pub fn set_pllsrc(&mut self, val: Pllsrc)

DIVMx and PLLs clock source selection Set and reset by software to select the PLL clock source. These bits can be written only when all PLLs are disabled. In order to save power, when no PLL is used, PLLSRC must be set to 11.

pub const fn divm(&self, n: usize) -> Pllm

prescaler for PLL1 Set and cleared by software to configure the prescaler of the PLL1. The hardware does not allow any modification of this prescaler when PLL1 is enabled (PLL1ON = 1). In order to save power when PLL1 is not used, the value of DIVM1 must be set to 0. … …

pub fn set_divm(&mut self, n: usize, val: Pllm)

prescaler for PLL1 Set and cleared by software to configure the prescaler of the PLL1. The hardware does not allow any modification of this prescaler when PLL1 is enabled (PLL1ON = 1). In order to save power when PLL1 is not used, the value of DIVM1 must be set to 0. … …

Trait Implementations

impl Clone for Pllckselr

fn clone(&self) -> Pllckselr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Pllckselr

fn default() -> Pllckselr

Returns the “default value” for a type.

impl PartialEq for Pllckselr

fn eq(&self, other: &Pllckselr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Pllckselr

impl Eq for Pllckselr

impl StructuralPartialEq for Pllckselr