Struct stm32_metapac::rcc::regs::Ckgdisr

#[repr(transparent)]
pub struct Ckgdisr(pub u32);

RCC AXI clocks gating disable register.

Tuple Fields

0: u32

Implementations

impl Ckgdisr

pub const fn axickg(&self) -> bool

AXI interconnect matrix clock gating disable This bit is set and reset by software.

pub fn set_axickg(&mut self, val: bool)

AXI interconnect matrix clock gating disable This bit is set and reset by software.

pub const fn ahbmckg(&self) -> bool

AXI master AHB clock gating disable This bit is set and reset by software.

pub fn set_ahbmckg(&mut self, val: bool)

AXI master AHB clock gating disable This bit is set and reset by software.

pub const fn sdmmc1ckg(&self) -> bool

AXI master SDMMC1 clock gating disable This bit is set and reset by software.

pub fn set_sdmmc1ckg(&mut self, val: bool)

AXI master SDMMC1 clock gating disable This bit is set and reset by software.

pub const fn hpdma1ckg(&self) -> bool

AXI master HPDMA1 clock gating disable This bit is set and reset by software.

pub fn set_hpdma1ckg(&mut self, val: bool)

AXI master HPDMA1 clock gating disable This bit is set and reset by software.

pub const fn cpuckg(&self) -> bool

AXI master CPU clock gating disable This bit is set and reset by software.

pub fn set_cpuckg(&mut self, val: bool)

AXI master CPU clock gating disable This bit is set and reset by software.

pub const fn gpus0ckg(&self) -> bool

AXI master 0 GPU clock gating disable This bit is set and reset by software.

pub fn set_gpus0ckg(&mut self, val: bool)

AXI master 0 GPU clock gating disable This bit is set and reset by software.

pub const fn gpus1ckg(&self) -> bool

AXI master 1 GPU clock gating disable This bit is set and reset by software.

pub fn set_gpus1ckg(&mut self, val: bool)

AXI master 1 GPU clock gating disable This bit is set and reset by software.

pub const fn gpuclckg(&self) -> bool

AXI master cache GPU clock gating disable This bit is set and reset by software.

pub fn set_gpuclckg(&mut self, val: bool)

AXI master cache GPU clock gating disable This bit is set and reset by software.

pub const fn dcmippckg(&self) -> bool

AXI master DCMIPP clock gating disable This bit is set and reset by software.

pub fn set_dcmippckg(&mut self, val: bool)

AXI master DCMIPP clock gating disable This bit is set and reset by software.

pub const fn dma2dckg(&self) -> bool

AXI master DMA2D clock gating disable This bit is set and reset by software.

pub fn set_dma2dckg(&mut self, val: bool)

AXI master DMA2D clock gating disable This bit is set and reset by software.

pub const fn gfxmmusckg(&self) -> bool

AXI matrix slave GFXMMU clock gating disable This bit is set and reset by software.

pub fn set_gfxmmusckg(&mut self, val: bool)

AXI matrix slave GFXMMU clock gating disable This bit is set and reset by software.

pub const fn ltdcckg(&self) -> bool

AXI master LTDC clock gating disable This bit is set and reset by software.

pub fn set_ltdcckg(&mut self, val: bool)

AXI master LTDC clock gating disable This bit is set and reset by software.

pub const fn gfxmmumckg(&self) -> bool

AXI master GFXMMU clock gating disable This bit is set and reset by software.

pub fn set_gfxmmumckg(&mut self, val: bool)

AXI master GFXMMU clock gating disable This bit is set and reset by software.

pub const fn ahbsckg(&self) -> bool

AXI slave AHB clock gating disable This bit is set and reset by software.

pub fn set_ahbsckg(&mut self, val: bool)

AXI slave AHB clock gating disable This bit is set and reset by software.

pub const fn fmcckg(&self) -> bool

AXI slave FMC and MCE3 clock gating disable This bit is set and reset by software.

pub fn set_fmcckg(&mut self, val: bool)

AXI slave FMC and MCE3 clock gating disable This bit is set and reset by software.

pub const fn xspi1ckg(&self) -> bool

AXI slave XSPI1 and MCE1 clock gating disable This bit is set and reset by software.

pub fn set_xspi1ckg(&mut self, val: bool)

AXI slave XSPI1 and MCE1 clock gating disable This bit is set and reset by software.

pub const fn xspi2ckg(&self) -> bool

AXI slave XSPI2 and MCE2 clock gating disable This bit is set and reset by software.

pub fn set_xspi2ckg(&mut self, val: bool)

AXI slave XSPI2 and MCE2 clock gating disable This bit is set and reset by software.

pub const fn axiram4ckg(&self) -> bool

AXI matrix slave SRAM4 clock gating disable This bit is set and reset by software.

pub fn set_axiram4ckg(&mut self, val: bool)

AXI matrix slave SRAM4 clock gating disable This bit is set and reset by software.

pub const fn axiram3ckg(&self) -> bool

AXI matrix slave SRAM3 clock gating disable This bit is set and reset by software.

pub fn set_axiram3ckg(&mut self, val: bool)

AXI matrix slave SRAM3 clock gating disable This bit is set and reset by software.

pub const fn axiram2ckg(&self) -> bool

AXI slave SRAM2 clock gating disable This bit is set and reset by software.

pub fn set_axiram2ckg(&mut self, val: bool)

AXI slave SRAM2 clock gating disable This bit is set and reset by software.

pub const fn axiram1ckg(&self) -> bool

AXI slave SRAM1 / error code correction (ECC) clock gating disable This bit is set and reset by software.

pub fn set_axiram1ckg(&mut self, val: bool)

AXI slave SRAM1 / error code correction (ECC) clock gating disable This bit is set and reset by software.

pub const fn flitfckg(&self) -> bool

AXI slave Flash interface (FLIFT) clock gating disable This bit is set and reset by software.

pub fn set_flitfckg(&mut self, val: bool)

AXI slave Flash interface (FLIFT) clock gating disable This bit is set and reset by software.

pub const fn extickg(&self) -> bool

EXTI clock gating disable This bit is set and reset by software.

pub fn set_extickg(&mut self, val: bool)

EXTI clock gating disable This bit is set and reset by software.

pub const fn jtagckg(&self) -> bool

JTAG automatic clock gating disabling This bit is set and reset by software.

pub fn set_jtagckg(&mut self, val: bool)

JTAG automatic clock gating disabling This bit is set and reset by software.

Trait Implementations

impl Clone for Ckgdisr

fn clone(&self) -> Ckgdisr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Ckgdisr

fn default() -> Ckgdisr

Returns the “default value” for a type.

impl PartialEq for Ckgdisr

fn eq(&self, other: &Ckgdisr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Ckgdisr

impl Eq for Ckgdisr

impl StructuralPartialEq for Ckgdisr