Struct stm32_metapac::sdmmc::regs::Idmabase0r

#[repr(transparent)]
pub struct Idmabase0r(pub u32);

The SDMMC_IDMABASE0R register contains the memory buffer base address in single buffer configuration and the buffer 0 base address in double buffer configuration.

Tuple Fields

0: u32

Implementations

impl Idmabase0r

pub const fn idmabase0(&self) -> u32

Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1).

pub fn set_idmabase0(&mut self, val: u32)

Buffer 0 memory base address bits [31:2], shall be word aligned (bit [1:0] are always 0 and read only). This register can be written by firmware when DPSM is inactive (DPSMACT = 0), and can dynamically be written by firmware when DPSM active (DPSMACT = 1) and memory buffer 0 is inactive (IDMABACT = 1).

Trait Implementations

impl Clone for Idmabase0r

fn clone(&self) -> Idmabase0r

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Idmabase0r

fn default() -> Idmabase0r

Returns the “default value” for a type.

impl PartialEq for Idmabase0r

fn eq(&self, other: &Idmabase0r) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Idmabase0r

impl Eq for Idmabase0r

impl StructuralEq for Idmabase0r

impl StructuralPartialEq for Idmabase0r