Struct stm32_metapac::spi::regs::Cfg2

#[repr(transparent)]
pub struct Cfg2(pub u32);

configuration register 2

Tuple Fields

0: u32

Implementations

impl Cfg2

pub const fn mssi(&self) -> u8

Master SS Idleness

pub fn set_mssi(&mut self, val: u8)

Master SS Idleness

pub const fn midi(&self) -> u8

Master Inter-Data Idleness

pub fn set_midi(&mut self, val: u8)

Master Inter-Data Idleness

pub const fn rdiom(&self) -> Rdiom

RDY signal input/output management Note: When DSIZE at the CFG1 register is configured shorter than 8-bit, the RDIOM bit has to be kept at zero.

pub fn set_rdiom(&mut self, val: Rdiom)

RDY signal input/output management Note: When DSIZE at the CFG1 register is configured shorter than 8-bit, the RDIOM bit has to be kept at zero.

pub const fn rdiop(&self) -> Rdiop

RDY signal input/output polarity

pub fn set_rdiop(&mut self, val: Rdiop)

RDY signal input/output polarity

pub const fn ioswp(&self) -> bool

Swap functionality of MISO and MOSI pins

pub fn set_ioswp(&mut self, val: bool)

Swap functionality of MISO and MOSI pins

pub const fn comm(&self) -> Comm

SPI Communication Mode

pub fn set_comm(&mut self, val: Comm)

SPI Communication Mode

pub const fn sp(&self) -> Sp

Serial Protocol

pub fn set_sp(&mut self, val: Sp)

Serial Protocol

pub const fn master(&self) -> Master

SPI Master

pub fn set_master(&mut self, val: Master)

SPI Master

pub const fn lsbfirst(&self) -> Lsbfirst

Data frame format

pub fn set_lsbfirst(&mut self, val: Lsbfirst)

Data frame format

pub const fn cpha(&self) -> Cpha

Clock phase

pub fn set_cpha(&mut self, val: Cpha)

Clock phase

pub const fn cpol(&self) -> Cpol

Clock polarity

pub fn set_cpol(&mut self, val: Cpol)

Clock polarity

pub const fn ssm(&self) -> bool

Software management of SS signal input

pub fn set_ssm(&mut self, val: bool)

Software management of SS signal input

pub const fn ssiop(&self) -> Ssiop

SS input/output polarity

pub fn set_ssiop(&mut self, val: Ssiop)

SS input/output polarity

pub const fn ssoe(&self) -> bool

SS output enable

pub fn set_ssoe(&mut self, val: bool)

SS output enable

pub const fn ssom(&self) -> Ssom

SS output management in master mode

pub fn set_ssom(&mut self, val: Ssom)

SS output management in master mode

pub const fn afcntr(&self) -> bool

Alternate function always control GPIOs

pub fn set_afcntr(&mut self, val: bool)

Alternate function always control GPIOs

Trait Implementations

impl Clone for Cfg2

fn clone(&self) -> Cfg2

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Cfg2

fn default() -> Cfg2

Returns the “default value” for a type.

impl PartialEq for Cfg2

fn eq(&self, other: &Cfg2) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Cfg2

impl Eq for Cfg2

impl StructuralEq for Cfg2

impl StructuralPartialEq for Cfg2