Struct stm32_metapac::rcc::regs::Icscr

#[repr(transparent)]
pub struct Icscr(pub u32);

Internal clock sources calibration register.

Tuple Fields

0: u32

Implementations

impl Icscr

pub const fn msical(&self) -> u8

MSI clock calibration These bits are initialized at startup with the factory-programmed MSI calibration trim value. When MSITRIM is written, MSICAL is updated with the sum of MSITRIM and the factory trim value.

pub fn set_msical(&mut self, val: u8)

MSI clock calibration These bits are initialized at startup with the factory-programmed MSI calibration trim value. When MSITRIM is written, MSICAL is updated with the sum of MSITRIM and the factory trim value.

pub const fn msitrim(&self) -> u8

MSI clock trimming These bits provide an additional user-programmable trimming value that is added to the MSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the MSI.

pub fn set_msitrim(&mut self, val: u8)

MSI clock trimming These bits provide an additional user-programmable trimming value that is added to the MSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the MSI.

pub const fn hsical(&self) -> u8

HSI clock calibration These bits are initialized at startup with the factory-programmed HSI calibration trim value. When HSITRIM is written, HSICAL is updated with the sum of HSITRIM and the factory trim value.

pub fn set_hsical(&mut self, val: u8)

HSI clock calibration These bits are initialized at startup with the factory-programmed HSI calibration trim value. When HSITRIM is written, HSICAL is updated with the sum of HSITRIM and the factory trim value.

pub const fn hsitrim(&self) -> u8

HSI clock trimming These bits provide an additional user-programmable trimming value that is added to the HSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the HSI. The default value is 64 when added to the HSICAL value, trim the HSI to 161MHz 1 11%.

pub fn set_hsitrim(&mut self, val: u8)

HSI clock trimming These bits provide an additional user-programmable trimming value that is added to the HSICAL[7:0] bits. It can be programmed to adjust to variations in voltage and temperature that influence the frequency of the HSI. The default value is 64 when added to the HSICAL value, trim the HSI to 161MHz 1 11%.

Trait Implementations

impl Clone for Icscr

fn clone(&self) -> Icscr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Icscr

fn default() -> Icscr

Returns the “default value” for a type.

impl PartialEq for Icscr

fn eq(&self, other: &Icscr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Icscr

impl Eq for Icscr

impl StructuralPartialEq for Icscr