Struct stm32_metapac::rcc::regs::Csr

#[repr(transparent)]
pub struct Csr(pub u32);

Control/status register.

Tuple Fields

0: u32

Implementations

impl Csr

pub const fn lsion(&self) -> bool

LSI oscillator enable Set and cleared by software to enable/disable the LSI oscillator:.

pub fn set_lsion(&mut self, val: bool)

LSI oscillator enable Set and cleared by software to enable/disable the LSI oscillator:.

pub const fn lsirdy(&self) -> bool

LSI oscillator ready Set and cleared by hardware to indicate when the LSI oscillator is ready (stable): After the LSION bit is cleared, LSIRDY goes low after 3 LSI oscillator clock cycles. This bit can be set even if LSION = 0 if the LSI is requested by the Clock Security System on LSE, by the Independent Watchdog or by the RTC.

pub fn set_lsirdy(&mut self, val: bool)

LSI oscillator ready Set and cleared by hardware to indicate when the LSI oscillator is ready (stable): After the LSION bit is cleared, LSIRDY goes low after 3 LSI oscillator clock cycles. This bit can be set even if LSION = 0 if the LSI is requested by the Clock Security System on LSE, by the Independent Watchdog or by the RTC.

pub const fn lsiprediv(&self) -> Lsiprediv

Internal low-speed oscillator pre-divided by 128 Set and reset by hardware to indicate when the low-speed internal RC oscillator has to be divided by 128. The software has to switch off the LSI before changing this bit.

pub fn set_lsiprediv(&mut self, val: Lsiprediv)

Internal low-speed oscillator pre-divided by 128 Set and reset by hardware to indicate when the low-speed internal RC oscillator has to be divided by 128. The software has to switch off the LSI before changing this bit.

pub const fn msisrange(&self) -> Msisrange

MSI range after Standby mode Set by software to chose the MSI frequency at startup. This range is used after exiting Standby mode until MSIRGSEL is set. After a pad or a power-on reset, the range is always 41MHz. MSISRANGE[3:0] can be written only when MSIRGSEL1=11. Others: Reserved Note: Changing the MSISRANGE[3:0] does not change the current MSI frequency.

pub fn set_msisrange(&mut self, val: Msisrange)

MSI range after Standby mode Set by software to chose the MSI frequency at startup. This range is used after exiting Standby mode until MSIRGSEL is set. After a pad or a power-on reset, the range is always 41MHz. MSISRANGE[3:0] can be written only when MSIRGSEL1=11. Others: Reserved Note: Changing the MSISRANGE[3:0] does not change the current MSI frequency.

pub const fn rmvf(&self) -> bool

Remove reset flags Set by software to clear the reset flags.

pub fn set_rmvf(&mut self, val: bool)

Remove reset flags Set by software to clear the reset flags.

pub const fn oblrstf(&self) -> bool

Option byte loader reset flag Set by hardware when a reset from the Option byte loading occurs. Cleared by setting the RMVF bit.

pub fn set_oblrstf(&mut self, val: bool)

Option byte loader reset flag Set by hardware when a reset from the Option byte loading occurs. Cleared by setting the RMVF bit.

pub const fn pinrstf(&self) -> bool

Pin reset flag Set by hardware when a reset from the NRST pin occurs. Cleared by setting the RMVF bit.

pub fn set_pinrstf(&mut self, val: bool)

Pin reset flag Set by hardware when a reset from the NRST pin occurs. Cleared by setting the RMVF bit.

pub const fn pwrrstf(&self) -> bool

BOR or POR/PDR flag Set by hardware when a BOR or POR/PDR occurs. Cleared by setting the RMVF bit.

pub fn set_pwrrstf(&mut self, val: bool)

BOR or POR/PDR flag Set by hardware when a BOR or POR/PDR occurs. Cleared by setting the RMVF bit.

pub const fn sftrstf(&self) -> bool

Software reset flag Set by hardware when a software reset occurs. Cleared by setting the RMVF bit.

pub fn set_sftrstf(&mut self, val: bool)

Software reset flag Set by hardware when a software reset occurs. Cleared by setting the RMVF bit.

pub const fn iwdgrstf(&self) -> bool

Independent window watchdog reset flag Set by hardware when an independent watchdog reset domain occurs. Cleared by setting the RMVF bit.

pub fn set_iwdgrstf(&mut self, val: bool)

Independent window watchdog reset flag Set by hardware when an independent watchdog reset domain occurs. Cleared by setting the RMVF bit.

pub const fn wwdgrstf(&self) -> bool

Window watchdog reset flag Set by hardware when a window watchdog reset occurs. Cleared by setting the RMVF bit.

pub fn set_wwdgrstf(&mut self, val: bool)

Window watchdog reset flag Set by hardware when a window watchdog reset occurs. Cleared by setting the RMVF bit.

pub const fn lpwrrstf(&self) -> bool

Low-power reset flag Set by hardware when a reset occurs due to illegal Stop, Standby, or Shutdown mode entry. Cleared by setting the RMVF bit. This operates only if nRST_STOP, nRST_STDBY or nRST_SHDW option bits are cleared.

pub fn set_lpwrrstf(&mut self, val: bool)

Low-power reset flag Set by hardware when a reset occurs due to illegal Stop, Standby, or Shutdown mode entry. Cleared by setting the RMVF bit. This operates only if nRST_STOP, nRST_STDBY or nRST_SHDW option bits are cleared.

Trait Implementations

impl Clone for Csr

fn clone(&self) -> Csr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Csr

fn default() -> Csr

Returns the “default value” for a type.

impl PartialEq for Csr

fn eq(&self, other: &Csr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Csr

impl Eq for Csr

impl StructuralPartialEq for Csr