Struct stm32_metapac::dcache::regs::Cr

#[repr(transparent)]
pub struct Cr(pub u32);

DCACHE control register.

Tuple Fields

0: u32

Implementations

impl Cr

pub const fn en(&self) -> bool

enable.

pub fn set_en(&mut self, val: bool)

enable.

pub const fn cacheinv(&self) -> bool

full cache invalidation Can be set by software, only when EN = 1. Cleared by hardware when the BUSYF flag is set (during full cache invalidation operation). Writing 0 has no effect.

pub fn set_cacheinv(&mut self, val: bool)

full cache invalidation Can be set by software, only when EN = 1. Cleared by hardware when the BUSYF flag is set (during full cache invalidation operation). Writing 0 has no effect.

pub const fn cachecmd(&self) -> u8

cache command maintenance operation (cleans and/or invalidates an address range) Can be set and cleared by software, only when no maintenance command is ongoing (BUSYCMDF = 0). others: reserved.

pub fn set_cachecmd(&mut self, val: u8)

cache command maintenance operation (cleans and/or invalidates an address range) Can be set and cleared by software, only when no maintenance command is ongoing (BUSYCMDF = 0). others: reserved.

pub const fn startcmd(&self) -> bool

starts maintenance command (maintenance operation defined in CACHECMD). Can be set by software, only when EN = 1, BUSYCMDF = 0, BUSYF = 0 and CACHECMD = 0b001, 0b010 or 0b011. Cleared by hardware when the BUSYCMDF flag is set (during cache maintenance operation). Writing 0 has no effect.

pub fn set_startcmd(&mut self, val: bool)

starts maintenance command (maintenance operation defined in CACHECMD). Can be set by software, only when EN = 1, BUSYCMDF = 0, BUSYF = 0 and CACHECMD = 0b001, 0b010 or 0b011. Cleared by hardware when the BUSYCMDF flag is set (during cache maintenance operation). Writing 0 has no effect.

pub const fn rhitmen(&self) -> bool

read-hit monitor enable.

pub fn set_rhitmen(&mut self, val: bool)

read-hit monitor enable.

pub const fn rmissmen(&self) -> bool

read-miss monitor enable.

pub fn set_rmissmen(&mut self, val: bool)

read-miss monitor enable.

pub const fn rhitmrst(&self) -> bool

read-hit monitor reset.

pub fn set_rhitmrst(&mut self, val: bool)

read-hit monitor reset.

pub const fn rmissmrst(&self) -> bool

read-miss monitor reset.

pub fn set_rmissmrst(&mut self, val: bool)

read-miss monitor reset.

pub const fn whitmen(&self) -> bool

write-hit monitor enable.

pub fn set_whitmen(&mut self, val: bool)

write-hit monitor enable.

pub const fn wmissmen(&self) -> bool

write-miss monitor enable.

pub fn set_wmissmen(&mut self, val: bool)

write-miss monitor enable.

pub const fn whitmrst(&self) -> bool

write-hit monitor reset.

pub fn set_whitmrst(&mut self, val: bool)

write-hit monitor reset.

pub const fn wmissmrst(&self) -> bool

write-miss monitor reset.

pub fn set_wmissmrst(&mut self, val: bool)

write-miss monitor reset.

pub const fn hburst(&self) -> bool

output burst type for cache master port read accesses Write access is always done in INCR burst type.

pub fn set_hburst(&mut self, val: bool)

output burst type for cache master port read accesses Write access is always done in INCR burst type.

Trait Implementations

impl Clone for Cr

fn clone(&self) -> Cr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Cr

fn default() -> Cr

Returns the “default value” for a type.

impl PartialEq for Cr

fn eq(&self, other: &Cr) -> bool

This method tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

This method tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Cr

impl Eq for Cr

impl StructuralEq for Cr

impl StructuralPartialEq for Cr