Struct stm32_metapac::rcc::regs::Apb2rstr

#[repr(transparent)]
pub struct Apb2rstr(pub u32);

Expand description

RCC APB2 peripheral reset register

Tuple Fields§

§0: u32

Implementations§

§

impl Apb2rstr

pub const fn tim1rst(&self) -> bool

TIM1 reset Set and cleared by software.

pub fn set_tim1rst(&mut self, val: bool)

TIM1 reset Set and cleared by software.

pub const fn spi1rst(&self) -> bool

SPI1 reset Set and cleared by software.

pub fn set_spi1rst(&mut self, val: bool)

SPI1 reset Set and cleared by software.

pub const fn tim8rst(&self) -> bool

TIM8 reset Set and cleared by software.

pub fn set_tim8rst(&mut self, val: bool)

TIM8 reset Set and cleared by software.

pub const fn usart1rst(&self) -> bool

USART1 reset Set and cleared by software.

pub fn set_usart1rst(&mut self, val: bool)

USART1 reset Set and cleared by software.

pub const fn tim15rst(&self) -> bool

TIM15 reset Set and cleared by software.

pub fn set_tim15rst(&mut self, val: bool)

TIM15 reset Set and cleared by software.

pub const fn tim16rst(&self) -> bool

TIM16 reset Set and cleared by software.

pub fn set_tim16rst(&mut self, val: bool)

TIM16 reset Set and cleared by software.

pub const fn tim17rst(&self) -> bool

TIM17 reset Set and cleared by software.

pub fn set_tim17rst(&mut self, val: bool)

TIM17 reset Set and cleared by software.

pub const fn sai1rst(&self) -> bool

SAI1 reset Set and cleared by software.

pub fn set_sai1rst(&mut self, val: bool)

SAI1 reset Set and cleared by software.

pub const fn sai2rst(&self) -> bool

SAI2 reset Set and cleared by software.

pub fn set_sai2rst(&mut self, val: bool)

SAI2 reset Set and cleared by software.

pub const fn usbrst(&self) -> bool

USB reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_usbrst(&mut self, val: bool)

USB reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn gfxtimrst(&self) -> bool

GFXTIM reset This bit is set and cleared by software. Note: .This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_gfxtimrst(&mut self, val: bool)

GFXTIM reset This bit is set and cleared by software. Note: .This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn ltdcrst(&self) -> bool

LTDC reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_ltdcrst(&mut self, val: bool)

LTDC reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn dsirst(&self) -> bool

DSI reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_dsirst(&mut self, val: bool)

DSI reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.