Struct stm32_metapac::rcc::regs::Ahb1rstr

#[repr(transparent)]
pub struct Ahb1rstr(pub u32);

RCC AHB1 peripheral reset register

Tuple Fields

0: u32

Implementations

impl Ahb1rstr

pub const fn gpdma1rst(&self) -> bool

GPDMA1 reset Set and cleared by software.

pub fn set_gpdma1rst(&mut self, val: bool)

GPDMA1 reset Set and cleared by software.

pub const fn cordicrst(&self) -> bool

CORDIC reset Set and cleared by software.

pub fn set_cordicrst(&mut self, val: bool)

CORDIC reset Set and cleared by software.

pub const fn fmacrst(&self) -> bool

FMAC reset Set and cleared by software.

pub fn set_fmacrst(&mut self, val: bool)

FMAC reset Set and cleared by software.

pub const fn mdf1rst(&self) -> bool

MDF1 reset Set and cleared by software.

pub fn set_mdf1rst(&mut self, val: bool)

MDF1 reset Set and cleared by software.

pub const fn crcrst(&self) -> bool

CRC reset Set and cleared by software.

pub fn set_crcrst(&mut self, val: bool)

CRC reset Set and cleared by software.

pub const fn jpegrst(&self) -> bool

JPEG reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_jpegrst(&mut self, val: bool)

JPEG reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn tscrst(&self) -> bool

TSC reset Set and cleared by software.

pub fn set_tscrst(&mut self, val: bool)

TSC reset Set and cleared by software.

pub const fn ramcfgrst(&self) -> bool

RAMCFG reset Set and cleared by software.

pub fn set_ramcfgrst(&mut self, val: bool)

RAMCFG reset Set and cleared by software.

pub const fn dma2drst(&self) -> bool

DMA2D reset Set and cleared by software.

pub fn set_dma2drst(&mut self, val: bool)

DMA2D reset Set and cleared by software.

pub const fn gfxmmurst(&self) -> bool

GFXMMU reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_gfxmmurst(&mut self, val: bool)

GFXMMU reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn gpu2drst(&self) -> bool

GPU2D reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_gpu2drst(&mut self, val: bool)

GPU2D reset This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

Trait Implementations

impl Clone for Ahb1rstr

fn clone(&self) -> Ahb1rstr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Ahb1rstr

fn default() -> Ahb1rstr

Returns the “default value” for a type.

impl PartialEq for Ahb1rstr

fn eq(&self, other: &Ahb1rstr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Ahb1rstr

impl Eq for Ahb1rstr

impl StructuralPartialEq for Ahb1rstr