Struct stm32_metapac::rcc::regs::Apb1smenr1

#[repr(transparent)]
pub struct Apb1smenr1(pub u32);

Expand description

RCC APB1 peripheral clocks enable in Sleep and Stop modes register 1

Tuple Fields§

§0: u32

Implementations§

§

impl Apb1smenr1

pub const fn tim2smen(&self) -> bool

TIM2 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim2smen(&mut self, val: bool)

TIM2 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn tim3smen(&self) -> bool

TIM3 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim3smen(&mut self, val: bool)

TIM3 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn tim4smen(&self) -> bool

TIM4 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim4smen(&mut self, val: bool)

TIM4 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn tim5smen(&self) -> bool

TIM5 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim5smen(&mut self, val: bool)

TIM5 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn tim6smen(&self) -> bool

TIM6 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim6smen(&mut self, val: bool)

TIM6 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn tim7smen(&self) -> bool

TIM7 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim7smen(&mut self, val: bool)

TIM7 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn wwdgsmen(&self) -> bool

Window watchdog clocks enable during Sleep and Stop modes Set and cleared by software. This bit is forced to 1 by hardware when the hardware WWDG option is activated.

pub fn set_wwdgsmen(&mut self, val: bool)

Window watchdog clocks enable during Sleep and Stop modes Set and cleared by software. This bit is forced to 1 by hardware when the hardware WWDG option is activated.

pub const fn spi2smen(&self) -> bool

SPI2 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_spi2smen(&mut self, val: bool)

SPI2 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn usart2smen(&self) -> bool

USART2 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_usart2smen(&mut self, val: bool)

USART2 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn usart3smen(&self) -> bool

USART3 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_usart3smen(&mut self, val: bool)

USART3 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn uart4smen(&self) -> bool

UART4 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_uart4smen(&mut self, val: bool)

UART4 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn uart5smen(&self) -> bool

UART5 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_uart5smen(&mut self, val: bool)

UART5 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn i2c1smen(&self) -> bool

I2C1 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_i2c1smen(&mut self, val: bool)

I2C1 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn i2c2smen(&self) -> bool

I2C2 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_i2c2smen(&mut self, val: bool)

I2C2 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn crssmen(&self) -> bool

CRS clock enable during Sleep and Stop modes Set and cleared by software.

pub fn set_crssmen(&mut self, val: bool)

CRS clock enable during Sleep and Stop modes Set and cleared by software.

pub const fn usart6smen(&self) -> bool

USART6 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_usart6smen(&mut self, val: bool)

USART6 clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.