Struct Adc4Cfgr1 

#[repr(transparent)]
pub struct Adc4Cfgr1(pub u32);

Configuration register 1

Tuple Fields

0: u32

Implementations

impl Adc4Cfgr1

pub const fn dmaen(&self) -> bool

Direct memory access enable

pub const fn set_dmaen(&mut self, val: bool)

Direct memory access enable

pub const fn dmacfg(&self) -> Adc4Dmacfg

Direct memory access configuration

pub const fn set_dmacfg(&mut self, val: Adc4Dmacfg)

Direct memory access configuration

pub const fn res(&self) -> Adc4Res

Data resolution

pub const fn set_res(&mut self, val: Adc4Res)

Data resolution

pub const fn scandir(&self) -> Adc4Scandir

Scan sequence direction

pub const fn set_scandir(&mut self, val: Adc4Scandir)

Scan sequence direction

pub const fn align(&self) -> Adc4Align

Data alignment

pub const fn set_align(&mut self, val: Adc4Align)

Data alignment

pub const fn extsel(&self) -> u8

External trigger selection

pub const fn set_extsel(&mut self, val: u8)

External trigger selection

pub const fn exten(&self) -> Adc4Exten

External trigger enable and polarity selection

pub const fn set_exten(&mut self, val: Adc4Exten)

External trigger enable and polarity selection

pub const fn ovrmod(&self) -> bool

Overrun management mode (0: ADC_DR is preserved when an overrun is detected, 1: ADC_DR is overwritten with the last conversion result)

pub const fn set_ovrmod(&mut self, val: bool)

Overrun management mode (0: ADC_DR is preserved when an overrun is detected, 1: ADC_DR is overwritten with the last conversion result)

pub const fn cont(&self) -> bool

Continuous conversion mode

pub const fn set_cont(&mut self, val: bool)

Continuous conversion mode

pub const fn wait(&self) -> bool

Wait conversion mode

pub const fn set_wait(&mut self, val: bool)

Wait conversion mode

pub const fn discen(&self) -> bool

Discontinuous mode

pub const fn set_discen(&mut self, val: bool)

Discontinuous mode

pub const fn chselrmod(&self) -> bool

Mode selection of the ADC_CHSELR register (0: one bit per channel, 1: fully configurable sequencer)

pub const fn set_chselrmod(&mut self, val: bool)

Mode selection of the ADC_CHSELR register (0: one bit per channel, 1: fully configurable sequencer)

pub const fn awd1sgl(&self) -> bool

Enable the analog watchdog 1 on a single channel (1) or on all channels (0)

pub const fn set_awd1sgl(&mut self, val: bool)

Enable the analog watchdog 1 on a single channel (1) or on all channels (0)

pub const fn awd1en(&self) -> bool

Analog watchdog 1 enable

pub const fn set_awd1en(&mut self, val: bool)

Analog watchdog 1 enable

pub const fn awd1ch(&self) -> u8

Analog watchdog 1 channel selection

pub const fn set_awd1ch(&mut self, val: u8)

Analog watchdog 1 channel selection

Trait Implementations

impl Clone for Adc4Cfgr1

fn clone(&self) -> Adc4Cfgr1

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Copy for Adc4Cfgr1

impl Debug for Adc4Cfgr1

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Adc4Cfgr1

fn default() -> Adc4Cfgr1

Returns the “default value” for a type.

impl Eq for Adc4Cfgr1

impl PartialEq for Adc4Cfgr1

fn eq(&self, other: &Adc4Cfgr1) -> bool

Equality operator ==.

fn ne(&self, other: &Rhs) -> bool

Inequality operator !=.

impl StructuralPartialEq for Adc4Cfgr1