Struct stm32_metapac::hspi::regs::Dcr2

#[repr(transparent)]
pub struct Dcr2(pub u32);

Expand description

HSPI device configuration register 2.

Tuple Fields§

§0: u32

Implementations§

§

impl Dcr2

pub const fn prescaler(&self) -> u8

Clock prescaler This field defines the scaler factor for generating the CLK based on the kernel clock (value├é┬á+├é┬á1). 2: FCLK = FKERNEL/3 … 255: FCLK = FKERNEL/256 For odd clock division factors, the CLK duty cycle is not 50├é┬á%. The clock signal remains low one cycle longer than it stays high. Writing this field automatically starts a new calibration of high-speed interface DLL at the start of next transfer, except in case CALOSR or CALISR have been written in the meantime. BUSY stays high during the whole calibration execution.

pub fn set_prescaler(&mut self, val: u8)

Clock prescaler This field defines the scaler factor for generating the CLK based on the kernel clock (value├é┬á+├é┬á1). 2: FCLK = FKERNEL/3 … 255: FCLK = FKERNEL/256 For odd clock division factors, the CLK duty cycle is not 50├é┬á%. The clock signal remains low one cycle longer than it stays high. Writing this field automatically starts a new calibration of high-speed interface DLL at the start of next transfer, except in case CALOSR or CALISR have been written in the meantime. BUSY stays high during the whole calibration execution.

pub const fn wrapsize(&self) -> u8

Wrap size This field indicates the wrap size to which the memory is configured. For memories which have a separate command for wrapped instructions, this field indicates the wrap-size associated with the command held in the WPIR register. 110-111: Reserved.

pub fn set_wrapsize(&mut self, val: u8)

Wrap size This field indicates the wrap size to which the memory is configured. For memories which have a separate command for wrapped instructions, this field indicates the wrap-size associated with the command held in the WPIR register. 110-111: Reserved.