Struct stm32_metapac::rcc::regs::Apb2smenr

#[repr(transparent)]
pub struct Apb2smenr(pub u32);

Expand description

RCC APB2 peripheral clocks enable in Sleep and Stop modes register

Tuple Fields§

§0: u32

Implementations§

§

impl Apb2smenr

pub const fn tim1smen(&self) -> bool

TIM1 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim1smen(&mut self, val: bool)

TIM1 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn spi1smen(&self) -> bool

SPI1 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_spi1smen(&mut self, val: bool)

SPI1 clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn tim8smen(&self) -> bool

TIM8 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim8smen(&mut self, val: bool)

TIM8 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn usart1smen(&self) -> bool

USART1clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub fn set_usart1smen(&mut self, val: bool)

USART1clocks enable during Sleep and Stop modes Set and cleared by software. Note: This bit must be set to allow the peripheral to wake up from Stop modes.

pub const fn tim15smen(&self) -> bool

TIM15 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim15smen(&mut self, val: bool)

TIM15 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn tim16smen(&self) -> bool

TIM16 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim16smen(&mut self, val: bool)

TIM16 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn tim17smen(&self) -> bool

TIM17 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_tim17smen(&mut self, val: bool)

TIM17 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn sai1smen(&self) -> bool

SAI1 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_sai1smen(&mut self, val: bool)

SAI1 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn sai2smen(&self) -> bool

SAI2 clocks enable during Sleep and Stop modes Set and cleared by software.

pub fn set_sai2smen(&mut self, val: bool)

SAI2 clocks enable during Sleep and Stop modes Set and cleared by software.

pub const fn usbsmen(&self) -> bool

USB clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_usbsmen(&mut self, val: bool)

USB clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn gfxtimsmen(&self) -> bool

GFXTIM clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_gfxtimsmen(&mut self, val: bool)

GFXTIM clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn ltdcsmen(&self) -> bool

LTDC clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_ltdcsmen(&mut self, val: bool)

LTDC clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn dsismen(&self) -> bool

DSI clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_dsismen(&mut self, val: bool)

DSI clock enable during Sleep and Stop modes This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.