stm32-metapac

Crates

git

Versions

stm32u5a5qj

Flavors

Module stm32_metapac::flash::regs

Structsยง

  • FLASH access control register
  • FLASH ECC register
  • FLASH non-secure boot address 0 register
  • FLASH non-secure boot address 1 register
  • FLASH non-secure control register
  • FLASH non-secure status register
  • FLASH OEM1 key register 1
  • FLASH OEM1 key register 2
  • FLASH OEM2 key register 1
  • FLASH OEM2 key register 2
  • FLASH operation status register
  • FLASH option register
  • FLASH bank 1 power-down key register
  • FLASH bank 2 power-down key register
  • FLASH privilege block based bank 1 register 1
  • FLASH privilege block based bank 1 register 2
  • FLASH privilege block based bank 1 register 3
  • FLASH privilege block based bank 1 register 4
  • FLASH privilege block based bank 2 register 1
  • FLASH privilege block based bank 2 register 2
  • FLASH privilege block based bank 2 register 3
  • FLASH privilege block based bank 2 register 4
  • FLASH privilege configuration register
  • FLASH secure block based bank 1 register 1
  • FLASH secure block based bank 1 register 2
  • FLASH secure block based bank 1 register 3
  • FLASH secure block based bank 1 register 4
  • FLASH secure block based bank 2 register 1
  • FLASH secure block based bank 2 register 2
  • FLASH secure block based bank 2 register 3
  • FLASH secure block based bank 2 register 4
  • FLASH secure boot address 0 register
  • FLASH secure control register
  • FLASH secure HDP control register
  • FLASH secure status register
  • FLASH secure watermark1 register 1
  • FLASH secure watermark1 register 2
  • FLASH secure watermark2 register 1
  • FLASH secure watermark2 register 2
  • FLASH WRP1 area A address register
  • FLASH WRP1 area B address register
  • FLASH WPR2 area A address register
  • FLASH WPR2 area B address register