Struct stm32_metapac::dsihost::regs::Cltcr

#[repr(transparent)]
pub struct Cltcr(pub u32);

DSI Host clock lane timer configuration register.

Tuple Fields

0: u32

Implementations

impl Cltcr

pub const fn lp2hs_time(&self) -> u16

Low-power to high-speed time This field configures the maximum time that the D-PHY clock lane takes to go from low‑power to high-speed transmission measured in lane byte clock cycles.

pub fn set_lp2hs_time(&mut self, val: u16)

Low-power to high-speed time This field configures the maximum time that the D-PHY clock lane takes to go from low‑power to high-speed transmission measured in lane byte clock cycles.

pub const fn hs2lp_time(&self) -> u16

High-speed to low-power time This field configures the maximum time that the D-PHY clock lane takes to go from high‑speed to low-power transmission measured in lane byte clock cycles.

pub fn set_hs2lp_time(&mut self, val: u16)

High-speed to low-power time This field configures the maximum time that the D-PHY clock lane takes to go from high‑speed to low-power transmission measured in lane byte clock cycles.

Trait Implementations

impl Clone for Cltcr

fn clone(&self) -> Cltcr

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Default for Cltcr

fn default() -> Cltcr

Returns the “default value” for a type.

impl PartialEq for Cltcr

fn eq(&self, other: &Cltcr) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Cltcr

impl Eq for Cltcr

impl StructuralPartialEq for Cltcr