Struct stm32_metapac::rcc::regs::Apb2enr

#[repr(transparent)]
pub struct Apb2enr(pub u32);

Expand description

RCC APB2 peripheral clock enable register

Tuple Fields§

§0: u32

Implementations§

§

impl Apb2enr

pub const fn tim1en(&self) -> bool

TIM1 clock enable Set and cleared by software.

pub fn set_tim1en(&mut self, val: bool)

TIM1 clock enable Set and cleared by software.

pub const fn spi1en(&self) -> bool

SPI1 clock enable Set and cleared by software.

pub fn set_spi1en(&mut self, val: bool)

SPI1 clock enable Set and cleared by software.

pub const fn tim8en(&self) -> bool

TIM8 clock enable Set and cleared by software.

pub fn set_tim8en(&mut self, val: bool)

TIM8 clock enable Set and cleared by software.

pub const fn usart1en(&self) -> bool

USART1clock enable Set and cleared by software.

pub fn set_usart1en(&mut self, val: bool)

USART1clock enable Set and cleared by software.

pub const fn tim15en(&self) -> bool

TIM15 clock enable Set and cleared by software.

pub fn set_tim15en(&mut self, val: bool)

TIM15 clock enable Set and cleared by software.

pub const fn tim16en(&self) -> bool

TIM16 clock enable Set and cleared by software.

pub fn set_tim16en(&mut self, val: bool)

TIM16 clock enable Set and cleared by software.

pub const fn tim17en(&self) -> bool

TIM17 clock enable Set and cleared by software.

pub fn set_tim17en(&mut self, val: bool)

TIM17 clock enable Set and cleared by software.

pub const fn sai1en(&self) -> bool

SAI1 clock enable Set and cleared by software.

pub fn set_sai1en(&mut self, val: bool)

SAI1 clock enable Set and cleared by software.

pub const fn sai2en(&self) -> bool

SAI2 clock enable Set and cleared by software.

pub fn set_sai2en(&mut self, val: bool)

SAI2 clock enable Set and cleared by software.

pub const fn usben(&self) -> bool

USB clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_usben(&mut self, val: bool)

USB clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn gfxtimen(&self) -> bool

GFXTIM clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_gfxtimen(&mut self, val: bool)

GFXTIM clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn ltdcen(&self) -> bool

LTDC clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_ltdcen(&mut self, val: bool)

LTDC clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub const fn dsien(&self) -> bool

DSI clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.

pub fn set_dsien(&mut self, val: bool)

DSI clock enable This bit is set and cleared by software. Note: This bit is only available on some devices in the STM32U5 Series. Refer to the device datasheet for availability of its associated peripheral. If not present, consider this bit as reserved and keep it at reset value.