Enum stm32_metapac::Interrupt

pub enum Interrupt {
    WWDG = 0,
    PVD_PVM = 1,
    TAMP_STAMP_LSECSS = 2,
    RTC_WKUP = 3,
    FLASH = 4,
    RCC = 5,
    EXTI0 = 6,
    EXTI1 = 7,
    EXTI2 = 8,
    EXTI3 = 9,
    EXTI4 = 10,
    DMA1_CHANNEL1 = 11,
    DMA1_CHANNEL2 = 12,
    DMA1_CHANNEL3 = 13,
    DMA1_CHANNEL4 = 14,
    DMA1_CHANNEL5 = 15,
    DMA1_CHANNEL6 = 16,
    DMA1_CHANNEL7 = 17,
    ADC1 = 18,
    C2SEV_PWR_C2H = 21,
    EXTI9_5 = 23,
    TIM1_BRK = 24,
    TIM1_UP_TIM16 = 25,
    TIM1_TRG_COM_TIM17 = 26,
    TIM1_CC = 27,
    TIM2 = 28,
    PKA = 29,
    I2C1_EV = 30,
    I2C1_ER = 31,
    SPI1 = 34,
    USART1 = 36,
    EXTI15_10 = 40,
    RTC_ALARM = 41,
    PWR_SOTF_BLEACT_802ACT_RFPHASE = 43,
    IPCC_C1_RX = 44,
    IPCC_C1_TX = 45,
    HSEM = 46,
    LPTIM1 = 47,
    LPTIM2 = 48,
    AES2 = 52,
    RNG = 53,
    FPU = 54,
    DMAMUX1_OVR = 62,
}

Variants

WWDG = 0

0 - WWDG

PVD_PVM = 1

1 - PVD_PVM

TAMP_STAMP_LSECSS = 2

2 - TAMP_STAMP_LSECSS

RTC_WKUP = 3

3 - RTC_WKUP

FLASH = 4

4 - FLASH

RCC = 5

5 - RCC

EXTI0 = 6

6 - EXTI0

EXTI1 = 7

7 - EXTI1

EXTI2 = 8

8 - EXTI2

EXTI3 = 9

9 - EXTI3

EXTI4 = 10

10 - EXTI4

DMA1_CHANNEL1 = 11

11 - DMA1_CHANNEL1

DMA1_CHANNEL2 = 12

12 - DMA1_CHANNEL2

DMA1_CHANNEL3 = 13

13 - DMA1_CHANNEL3

DMA1_CHANNEL4 = 14

14 - DMA1_CHANNEL4

DMA1_CHANNEL5 = 15

15 - DMA1_CHANNEL5

DMA1_CHANNEL6 = 16

16 - DMA1_CHANNEL6

DMA1_CHANNEL7 = 17

17 - DMA1_CHANNEL7

ADC1 = 18

18 - ADC1

C2SEV_PWR_C2H = 21

21 - C2SEV_PWR_C2H

EXTI9_5 = 23

23 - EXTI9_5

TIM1_BRK = 24

24 - TIM1_BRK

TIM1_UP_TIM16 = 25

25 - TIM1_UP_TIM16

TIM1_TRG_COM_TIM17 = 26

26 - TIM1_TRG_COM_TIM17

TIM1_CC = 27

27 - TIM1_CC

TIM2 = 28

28 - TIM2

PKA = 29

29 - PKA

I2C1_EV = 30

30 - I2C1_EV

I2C1_ER = 31

31 - I2C1_ER

SPI1 = 34

34 - SPI1

USART1 = 36

36 - USART1

EXTI15_10 = 40

40 - EXTI15_10

RTC_ALARM = 41

41 - RTC_ALARM

PWR_SOTF_BLEACT_802ACT_RFPHASE = 43

43 - PWR_SOTF_BLEACT_802ACT_RFPHASE

IPCC_C1_RX = 44

44 - IPCC_C1_RX

IPCC_C1_TX = 45

45 - IPCC_C1_TX

HSEM = 46

46 - HSEM

LPTIM1 = 47

47 - LPTIM1

LPTIM2 = 48

48 - LPTIM2

AES2 = 52

52 - AES2

RNG = 53

53 - RNG

FPU = 54

54 - FPU

DMAMUX1_OVR = 62

62 - DMAMUX1_OVR

Trait Implementations

impl Clone for Interrupt

fn clone(&self) -> Interrupt

Returns a copy of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Interrupt

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl InterruptNumber for Interrupt

fn number(self) -> u16

Return the interrupt number associated with this variant.

impl PartialEq for Interrupt

fn eq(&self, other: &Interrupt) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Copy for Interrupt

impl Eq for Interrupt

impl StructuralPartialEq for Interrupt