Struct stm32_metapac::rcc::regs::Ahb5smenr
#[repr(transparent)]pub struct Ahb5smenr(pub u32);
Expand description
RCC AHB5 peripheral clocks enable in Sleep and Stop modes register
Tuple Fields§
§0: u32
Implementations§
§impl Ahb5smenr
impl Ahb5smenr
pub const fn radiosmen(&self) -> bool
pub const fn radiosmen(&self) -> bool
2.4 GHz RADIO bus clock enable during Sleep and Stop modes when the 2.4 GHz RADIO is active. Set and cleared by software. Access can be secured by GTZC_TZSC RADIOSEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with RCC SPRIV or when non-secure with RCC NSPRIV.
pub fn set_radiosmen(&mut self, val: bool)
pub fn set_radiosmen(&mut self, val: bool)
2.4 GHz RADIO bus clock enable during Sleep and Stop modes when the 2.4 GHz RADIO is active. Set and cleared by software. Access can be secured by GTZC_TZSC RADIOSEC. When secure, a non-secure read/write access is RAZ/WI. It does not generate an illegal access interrupt. This bit can be protected against unprivileged access when secure with RCC SPRIV or when non-secure with RCC NSPRIV.